Demo Data from EDBT 2026 / reviewers in the wild / expert
William S. Wong 0001
dblp:57/1468
· DBLP profile ↗
2ranked-venue papers
1as first author
0since 2021 · last 2010
0000-0001-7543-9761ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 67% Electronic design automation · 33% | |
| Computer graphics and multimedia
1 paper |
Image and video processing · 100% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › flexible electronics
printed electronics |
0.1 | 1 | 2005 | Printing Methods and Materials for Large-Area Electronic Devices · Proc. IEEE 2005 |
Integrated circuit design › flexible electronics
thin-film transistor circuits |
0.1 | 1 | 2005 | Printing Methods and Materials for Large-Area Electronic Devices · Proc. IEEE 2005 |
Image and video processing › printing
inkjet printing |
0.0 | 1 | 2005 | Printing Methods and Materials for Large-Area Electronic Devices · Proc. IEEE 2005 |
Methods — techniques the papers use, named apart from their topics
inkjet printing · 0.1digital lithography · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2010 | Fabrication and testing of large-area flexible electronics for displays and sensor arraysabstractIn this presentation, an overview of low-temperature processing for thin-film transistor array fabrication, using jet-printing, will be given along with the integration of these backplanes with organic and inorganic sensor materials. The approach using jetprinting, or digital lithography, provides an extra degree of freedom for patterning device structures on flexible platforms. This technique allows for real-time monitoring of layer registration and alignment correction using a digital patterning technique. The characterization of low-temperature compatible materials will also be reviewed in regard to conditions that determine device stability and performance in silicon-based devices. A rapid testing strategy that identifies many common defects in flexible backplane arrays will be presented. Finally, an overview of specific applications for flexible backplanes, displays, and image sensor arrays will be given. William S. Wong 0001 |
VTS | 1 |
| 2005 | Printing Methods and Materials for Large-Area Electronic DevicesabstractTwo digital printing methods for the fabrication of active matrix thin-film transistor (AM-TFT) backplanes for displays are described. A process using printed resists layers, referred to as digital lithography, was used to fabricate arrays of hydrogenated amorphous silicon TFTs. TFTs were also fabricated using a combination of digital lithography to pattern metals and inkjet printing to pattern and deposit a polymeric semiconducting layer. The relative performance of amorphous silicon and polymer TFTs were evaluated. The utility of digital lithographic processing was demonstrated by the fabrication of prototype reflective displays using electrophoretic media. Michael Chabinyc, William S. Wong 0001, Ana Claudia Arias, Steven Ready, Rene A. Lujan, Jürgen H. Daniel, Brent Krusor, Raj B. Apte, Alberto Salleo, Robert A. Street |
Proc. IEEE | 2 |