Large area flexible electronics (FE) is emerging for low-cost, light-weight wearable electronics, artificial skins and IoT nodes, benefiting from its low-cost fabrication and mechanical flexibility. How-ever, the low temperature requirement for fabrication on a flexible substrate and the large-area nature of flexible sensor arrays inevitably result in inadequate device yield, reliability and stability. Therefore, it is essential to develop design methodologies for large area sensing applications which can ensure system robustness with-out relying on highly reliable devices. Based on the observation that most signals sensed by body sensor arrays exhibit sparse statistical characteristics, we propose a system design method which lever-ages the sparse nature via compressed sensing (CS). Specifically, we use flexible circuitry to implement a CS encoder and decode the compressed signal in the silicon side. As a system demonstration, we fabricated the temperature sensor array, shift register and amplifier to illustrate the feasibility of the encoder design using carbon-nanotube-based flexible thin-film transistors. To evaluate the improvement of system robustness achieved by the proposed sensing schema, we conducted two case studies: temperature imaging and tactile-sensor based object recognition. With ~10% sparse errors (due to either device defects or transient errors), we achieved reduction of root-mean-square-error (RMSE) from 0.20 to 0.05 for temperature sensing and boost the classification accuracy from 65% to 84% for tactile-sensing based object recognition.

Skin-inspired electronics emerges as a new paradigm due to the increasing demands for conformable and high-quality skin-sensor-silicon (SSS) interfacing in wearable, electronic skin and health monitoring applications. Advances in ultra-thin, flexible, stretchable and conformable materials have made skin electronics feasible. In this paper, we prototyped an active electrode (with a thickness ≤ 2 um), which integrates the electrode with a thin-film transistor (TFT) based amplifier, to effectively suppress motion artifacts. The fabricated ultra-thin amplifier can achieve a gain of 32 dB at 20 kHz, demonstrating the feasibility of the proposed active electrode. Using atrial fibrillation (AF) detection for electrocardiogram (ECG) as an application driver, we further develop a simulation framework taking into account all elements including the skin, the sensor, the amplifier and the silicon chip. Systematic and quantitative simulation results indicate that the proposed active electrode can effectively improve the signal quality under motion noises (achieving ≥30 dB improvement in signal-to-noise ratio (SNR)), which boosts classification accuracy by more than 19% for AF detection.

High-performance low-cost flexible hybrid electronics (FHE) are desirable for internet of things (IoT). Carbon-nanotube (CNT) thin-film transistor (TFT) is a promising candidate for high-performance FHE because of its high carrier mobility (25cm2/V.s), superior mechanical flexibility/stretchability, and material compatibility with low-cost printing and solution processes. Flexible sensors and peripheral CNT-TFT circuits, such as decoders, drivers and sense amplifiers, can be printed and integrated with thinned (<;50μm) silicon chips on soft, thin, and flexible substrates for appealing product designs and form factors. Here we report: 1) process design kit (PDK) to enable FHE design automation, from device modeling to physical verification, and 2) open-source and solution-process proven intellectual property (IP) blocks, including Pseudo-CMOS [1] digital logic and analog amplifiers on flexible substrates, as shown in Figure 1. The proposed FHE-PDK and circuit design IP are fully compatible with silicon design EDA tools, and can be readily used for co-design with both CNT-TFT circuits and silicon chips.

Flexible Electronics (FE) is emerging for wearables and low-cost internet of things (IoT) nodes benefiting from its low-cost fabrication and mechanical flexibility. Combining FE with thinned silicon chips, known as flexible hybrid electronics (FHE), can take advantages of both low-cost printed electronics and high performance silicon chips. To design a FHE system, the process design kit (PDK) offering the capabilities for circuit design, simulation and verification for both FE and silicon chips is needed. The key elements of FHE-PDK include technology files for design rule checking (DRC), layout versus schematic (LVS) and layout parasitics extraction (LPE), as well as SPICE-compatible models for flexible thin-film transistors (TFTs) and passive elements. Wafer scale measurements are used to validate our SPICE models and design rules are derived accordingly to assure a satisfactory yield. With FHE-PDK, circuit and system designers can therefore focus on design innovations and can rely on design tools to produce manufacturable designs.

Carbon nanotube thin film transistor (CNT-TFT) is a promising candidate for flexible electronics, because of its high carrier mobility and great mechanical flexibility. An accurate and trustworthy device model for CNT-TFTs, however, is still missing. In this paper, we present a SPICE-compatible compact model for CNT-TFT circuit simulation and validate the proposed model based on fabricated CNT-TFTs and Pseudo-CMOS circuits [1][2]. The proposed CNT-TFT model enables circuit designers to explore design space by adjusting device parameters, supply voltages and transistor sizes to optimize the noise margin (NM) and power-delay product (PDP), which are the key merits for larger scale CNT-TFT circuits. We further propose a design framework to effectively optimize the NM and PDP to facilitate greater automation of flexible circuit design based on CNT-TFTs.

The IP session focuses on design and test aspects of emerging flexible hybrid electronics (FHE). The first contribution discusses process design kit for flexible hybrid electronics. The second presentation identifies challenges of FHE design and test as well as application examples and future opportunities. The last contribution discusses design and test considerations for FHE including a proof-of-concept demonstration using proprietary FHE technologies.

Flexible electronics is promising for a number of emerging applications such as foldable smartphone, wearables and internet of things (IoT) [1], [2], [3]. However, the key elements of flexible electronics, the thin-film transistors (TFT), often suffer from large process variations and inferior reliability. There is also a lack of trustworthy compact models for these devices. This paper gives an overview of design challenges for the flexible circuits, introduces a robust design style, Pseudo-CMOS, that has been widely used for digital TFT designs, and highlights the development of a flexible hybrid electronics process design kit (FHE-PDK) supporting design automation and verification of flexible hybrid electronics.

Flexible electronics is a promising technology for wearable applications. The flexible printed thin-film transistor (TFT) circuits, however, often suffer from large process variations and inferior long-term reliability. This paper describes recent progress on robust printed circuits, including a novel design style known as Pseudo-CMOS, which was invented [1] to tackle design challenges for flexible TFT circuits. With post-fabrication tuning capability, Pseudo-CMOS can survive large process variations which are inevitable for the low-cost printing process. Furthermore, degradation of circuit performance, either due to variations or aging, can be recovered by means of an external tuning circuit. The paper also illustrates some design examples of Pseudo-CMOS circuits for applications to energy [2], healthcare [3], biomedical [4], and near-field communication (NFC) tags [5], [6].

Printed electronics (PE) on flexible substrates is a promising technology for wearables and internet of things (IoT). To implement an integrated system on flexible substrates for applications ranging from medical imaging to disposable thermometers, robust design methodology based on unreliable printed components plays a critical role. This paper reviews robust design of printed circuits based on thin-film transistors (TFT). A novel design style known as Pseudo-CMOS [1], which can tackle several design challenges of TFT circuits, is also introduced. Design examples of Pseudo-CMOS circuits for applications in energy [2], healthcare [3], biomedical [4], and near-field communication (NFC) tags [5], [6] are discussed.

Short-reach nanophotonic interconnects are promising to solve the communication bottleneck in data centers and chip-level scenarios. However, the nanophotonic interconnects are sensitive to process and thermal variations, especially for the microring structures, resulting in significant variation of an optical link's bit error rate (BER). In this paper, we propose a power-efficient adaptive tuning approach for nanophotonic interconnects to address the variation issues. During the adaptive tuning process, each nanophotonic interconnect is adaptively allocated just enough power to meet the BER requirement. The proposed adaptive tuning approach could reduce the photonic receiver power by 8% - 34% than the worst-case based fixed design while achieving the same BER. Our evaluation results show that the adaptive tuning approach scales well with the process variation, the thermal variation and the number of communication nodes, and can accommodate different types of NoC architectures and lasers.

Flexible electronics have attracted much attention since they enable promising applications such as low-cost RFID tags and e-paper. Thin-film transistors (TFTs) are considered as an ideal candidate to implement flexible electronics on low-cost substrates. Most TFT technologies, however, have only mono-type - either n- or p-type - devices and thus modern design technologies for silicon-based electronics cannot be directly applied. In this paper, we propose a novel design style Pseudo-CMOS for flexible electronics that uses only mono-type TFTs while achieving comparable performance with the complementary-type designs. The manufacturing cost and complexity can therefore be significantly reduced while the circuit yield and reliability are also enhanced with the built-in capability of post-fabrication tuning. Some standard cells have been designed and fabricated in p-type organic and n-type InGaZnO (IGZO) TFT technologies which successfully verify the superiority of the proposed Pseudo-CMOS design style. To the best of our knowledge, this is the first design solution that has proven superior performance for both types of TFT technologies.

Pressure sensors are ideal candidates for implementing portable digital music instruments. Existing commercial pressure sensors, however, are not optimized to meet both timing and precision requirements for acoustic uses. In this paper, we demonstrate a portable multi-pitch electronic drum (e-drum) system based on large-area (> 15cm in diameter) ring-shaped pressure sensors made with low-cost screen-printing process. This e-drum system, which can accurately generate six different pitches of sounds in the current prototype, has the following key advantages: 1) a light-weight, flexible, bendable, and robust human-instrument interface, 2) real-time sound responses, 3) comparable acoustic sound quality with the conventional drums, and 4) easily expandable to a much larger number of sound-pitches. The digital music synthesis is implemented using a TI-DSP board and can be easily re-configured to realize other percussion instruments such as pianos and xylophones. To the best of our knowledge, this is the first successful demonstration of a portable e-drum based on large-area ring-shaped flexible sensors, whose success could open up many new applications.

This talk discusses some recent progress in robust circuit/system design and test of flexible electronics. We will first give an overview of reliability simulation for predicting TFT degradation under bias-stress. A reliability analysis framework, which has successfully analyzed the reliability of an amorphous-silicon (a-Si) TFT scan driver for TFT-LCD displays, will be discussed [1]. We then discuss solutions that can make TFT circuits operable under a lower supply voltage and can equip them with post-fabrication tunability for reliability and performance enhancement. Specifically, we will present a new design style, named Pseudo-CMOS [2], which has been successfully validated in a p-type organic TFT technology [3] as well as in a n-type InGaZnO (IGZO) TFT technology.

Flexible electronics fabricated on thin-film, lightweight, and bendable substrates (e.g., plastic) have great potential for novel applications in consumer electronics such as flexible displays, e-paper, and smart labels; however, the key elements, namely thin-film transistors (TFTs), for implementing flexible circuits often suffer from electrical instability. Therefore, thorough reliability analysis is critical for flexible circuit design to ensure that the circuit will operate reliably throughout its lifetime. In this article we propose a methodology for reliability simulation of hydrogenated amorphous silicon (a-Si:H) TFT circuits. We show that: (1) the threshold voltage ( V TH ) shift of a single TFT can be estimated by analyzing its operating conditions; and (2) the circuit lifetime can be predicted accordingly by using SPICE-like simulators with proper modeling. We also propose an algorithm to reduce the simulation time by orders of magnitude, with good prediction accuracy. To validate our analytical model and simulation methodology, we compare simulation results with the actual circuit measurements of an integrated a-Si:H TFT scan driver fabricated on a glass substrate and we demonstrate very good consistency.

Flexible electronics fabricated with thin-film and bendable substrates (e.g., plastic) have great potential for novel applications in consumer electronics such as flexible displays, e-paper, and smart labels; however, the key elements --- namely thin-film transistors (TFTs) --- often suffer from electrical instability. Therefore, thorough reliability analysis is critical for flexible circuit design to ensure that the circuit would operate reliably throughout its lifetime. In this paper, we propose a methodology for a-Si:H TFT circuits' reliability simulation. We show that: (1) the threshold voltage (VTH) shift of a single TFT can be modeled by analyzing its operating conditions and (2) the circuit lifetime can be predicted accordingly using SPICE. We also propose an algorithm to reduce the simulation time by orders of magnitude with negligible accuracy loss. To validate our analytical model and simulation methodology, we compare the SPICE simulation results with the actual measurements of our integrated a-Si:H TFT scan driver fabricated on the glass substrate and demonstrate very high consistency in the overall results.