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Robert E. Lyons

dblp:57/3145 · DBLP profile ↗
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6ranked-venue papers
3as first author
0since 2021 · last 1985
0009-0000-3175-804XORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 5 · 2 first-authorSystems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
3 papers
Internet architecture and protocols · 67% Routing and switching · 28% Cellular and mobile networks · 6%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 62% Hardware reliability and fault tolerance · 38%

Topics — the 9 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Internet architecture and protocols
integrated services
0.011980
Conceptual Approaches to Switching in Future Military Networks · IEEE Trans. Commun. 1980
Internet architecture and protocols
network interconnection
0.011980
A Total AUTODIN System Architecture · IEEE Trans. Commun. 1980
Routing and switching
switching
0.011980
Conceptual Approaches to Switching in Future Military Networks · IEEE Trans. Commun. 1980
Routing and switching › switching
circuit and packet switching
0.011980
Conceptual Approaches to Switching in Future Military Networks · IEEE Trans. Commun. 1980
Internet architecture and protocols
protocol standardization
0.011980
A Total AUTODIN System Architecture · IEEE Trans. Commun. 1980
Hardware reliability and fault tolerance › redundancy
redundant logic
0.011970
The Synthesis of Redundant Threshold- Logic Elements · IEEE Trans. Computers 1970
Integrated circuit design › digital circuit design › threshold logic
threshold logic circuits
0.011970
The Synthesis of Redundant Threshold- Logic Elements · IEEE Trans. Computers 1970
Integrated circuit design
digital circuit design
0.011970
The Synthesis of Redundant Threshold- Logic Elements · IEEE Trans. Computers 1970
Integrated circuit design › digital circuit design
threshold logic
0.011970
The Synthesis of Redundant Threshold- Logic Elements · IEEE Trans. Computers 1970

Methods — techniques the papers use, named apart from their topics

system architecture design · 0.0von neumann multiplexing · 0.0theorem proving · 0.0
YearPublicationVenuePosition
1985 1984 Has Arrived: An Essay
Robert E. Lyons
Comput. Networks1
1983 Military Requirements for Packet-Switched Networks and Their Implications for Protocol Standardization
Vint Cerf, Robert E. Lyons
Comput. Networks2
1980 Conceptual Approaches to Switching in Future Military Networks
abstract
This paper presents conceptual approaches to the synthesis of switching functions in future military networks. The special requirements of military communications are shown to favor the implementation of integrated networks which provide all services (voice, data, imagery) within a single unified network structure. Transparent and transactional methods are defined as contrasting approaches to the realization of the required switching functions. The conceptual approaches to switching in future military networks are presented in the context of cultural differences which appear to exist between the differing perceptions of the adherents of circuit switching and packet switching. Special consideration is devoted to the issue of software engineering and the impact of current trends in DoD procurement policy.
Gino J. Coviello, Robert E. Lyons
IEEE Trans. Commun.2
1980 A Total AUTODIN System Architecture
abstract
This paper concerns data communications in the U.S Department of Defense. It includes a historical perspective on DoD common-user data systems: AUTODIN I, ARPANET, and AUTODIN II. It treats data communications on an end-to-end basis, including automation of communications center functions by the user. The Integrated AUTODIN System Architecture (IASA) project was defined by DoD to provide a total data communications system design on an end-to-end basis. The main results of this paper are based on IASA work and include the use of AUTODIN II as the IAS backbone, the integration of AUTODIN I and AUTODIN II, the definition of a new DoD program called the Inter-Service/Agency Automated Message Processing Exchange (I-S/A AMPE), the development of DoD standard protocols, formats and procedures, a brief description of the IAS security architecture, and a plan for internetting different networks via gateways and internet protocols. A plan for the future disposition of the ARPANET is included. The paper concludes with some speculative material on the long-range future of United States military data communications.
Robert E. Lyons
IEEE Trans. Commun.1
1979 Panel on military data networks: Present plans and future requirements
abstract
In the first talk, Dr. Lebow will discuss DoD plans for providing secure voice for three disparate communities within DoD: 1. Narrowband Tactical (datarate: up to 2.4 KB), 2. Wideband Tactical (16 and 32 KB) and 3. Long-haul Strategic (DCS-based, up to 9.6 KB). Dr. Lebow will compare advantages and deficiencies of the three systems and will discuss the evolution of these systems into a two-rate architecture in the 1990's.,
Franklin F. Kuo, Irwin L. Lebow, Robert E. Lyons, Chris Wilcox, Thomas Bartee
SIGCOMM3
1970 The Synthesis of Redundant Threshold- Logic Elements
abstract
This paper is devoted to the development of procedures for synthesizing threshold-logic elements which can be employed in redundant networks based on the von Neumann multiplexing principle. A major result is the statement of rules for synthesizing elements whose outputs are correct despite the presence of e or fewer errors on the input lines. Several theorems are proved and used as the basis for establishing synthesis rules for four canonical redundant threshold element specifications. Some of these canonical elements are optimum in the sense that they require the minimum sum of weights or minimum sum of input bundle sizes.
Robert E. Lyons
IEEE Trans. Computers1