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Mariam Momenzadeh

dblp:57/5814 · DBLP profile ↗
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10ranked-venue papers
2as first author
0since 2021 · last 2010
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 9 · 2 first-authorSoftware engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 70% Emerging computing paradigms · 30%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
logic synthesis
0.112005
Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2005
Emerging computing paradigms › field-coupled nanocomputing
quantum-dot cellular automata
0.112005
Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2005
Electronic design automation › logic synthesis
technology mapping
0.112005
Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2005
Electronic design automation
defect analysis
0.012005
Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2005

Methods — techniques the papers use, named apart from their topics

simulation-based analysis · 0.1
YearPublicationVenuePosition
2010 Emulating shared-memory Do-All algorithms in asynchronous message-passing systems
Dariusz R. Kowalski, Mariam Momenzadeh, Alexander A. Schwarzmann
J. Parallel Distributed Comput.2
2007 On the Tolerance to Manufacturing Defects in Molecular QCA Tiles for Processing-by-wire
Jing Huang 0001, Mariam Momenzadeh, Fabrizio Lombardi
J. Electron. Test.2
2007 Analysis of missing and additional cell defects in sequential quantum-dot cellular automata
Jing Huang 0001, Mariam Momenzadeh, Fabrizio Lombardi
Integr.2
2006 Defect tolerance of QCA tiles
abstract
Quantum dot Cellular Automata (QCA) is one of the promising technologies for nano scale implementation. The operation of QCA systems is based on a new paradigm generally referred to as processing-by-wire (PBW). This paper analyzes the defect tolerance properties of PBW when tiles are employed using molecular QCA cells. Based on a 3×3 QCA block, with different input/output arrangements, different tiles are analyzed and simulated using a coherence vector engine. The functional characterization and polarization level of these tiles for undeposited cell defects are reported. It is shown that novel features of PBW are possible due to spatial redundancy and QCA tiles are robust and inherently defect tolerant.
Jing Huang 0001, Mariam Momenzadeh, Fabrizio Lombardi
DATE2
2005 Tile-based QCA design using majority-like logic primitives
abstract
The design of circuits and systems in Quantum-dot Cellular Automata (QCA) is still in infancy. The basic logic primitive in QCA is the majority voter (MV), that is not a universal function; so, inverters (INV) are also required. Blocks (referred to as tiles) are utilized in this article. A tile with a combined logic function of MV and INV (MV-like function) is proposed. It is shown that the MV-like tile can be effectively used in logic design as basic primitive. Tiles based on both the fully populated (FP) and non-fully populated (NFP) grids are investigated in detail. Various arrangements in inputs and outputs are also possible among the 4 sides of a grid, thus defining different tiles. Using a coherence vector simulation engine, it is shown that the 3 × 3 grid offers versatile logic operation. Different combinational functions such as majority-like and wire crossing are obtained using these tiles. Tile-based design of different circuits is compared to gate-based and SQUARES designs.
Jing Huang 0001, Mariam Momenzadeh, Luca Schiano, Marco Ottavi, Fabrizio Lombardi
ACM J. Emerg. Technol. Comput. Syst.2
2005 Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementation
abstract
Quantum-dot cellular automata (QCA) offers a new computing paradigm for nanotechnology. The basic logic elements of this technology are the majority voter (MV) and the inverter (INV). However, an experimental evaluation has shown that MV is not efficiently used during technology mapping by existing logic-synthesis tools. In this paper, we propose the design and characterization of a novel complex, yet very small, QCA logic gate: the and-or-inverter (AOI) gate. The paper presents a detailed simulation-based analysis of the AOI gate, as well as the study of QCA defects and their effects at the logic level. The AOI implements a universal logic gate; all elementary gates can be implemented by the AOI gate. Moreover, many two-level logic functions can be directly implemented by a single AOI gate. The AOI gate performs quite favorably, in terms of digital logic synthesis. Unlike MV, this gate is efficiently used by existing logic-synthesis tools. Our experimental data on synthesis of complex designs show that using the AOI gate instead of MV, results in up to 23.9% logic area savings, while improving the overall delay.
Mariam Momenzadeh, Jing Huang 0001, Mehdi Baradaran Tahoori, Fabrizio Lombardi
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2004 Design and characterization of an and-or-inverter (AOI) gate for QCA implementation
abstract
Quantum-dot Cellular Automata (QCA) offers a new computing paradigm in nanotechnology. The basic logic elements of this technology are the inverter and the majority voter. In this paper, we propose a novel complex and universal QCA gate: the And-Or-Inverter (AOI) gate, which is a 5 input gate consisting of 7 cells. This paper presents a detailed simulation-based analysis of the AOI gate as well as the characterization of QCA defects and study of their effects at logic level. Design implementations using the AOI gate are compared with the conventional CMOS and the majority voter-based QCA methodology. Testing of the AOI gate at logic level is also addressed, unique testing features of designs based on this complex gate have been investigated.
Jing Huang 0001, Mariam Momenzadeh, Mehdi Baradaran Tahoori, Fabrizio Lombardi
ACM Great Lakes Symposium on VLSI2
2004 Quantum Cellular Automata: New Defects and Faults for New Devices
abstract
Summary form only given. There has been considerable research on quantum cellular automata (QCA) as a new computing scheme in the nanoscale regimes. A detailed simulation-based characterization of defects in different QCA logic and interconnect devices and study of their effects at logic-level are presented. Various failure mechanisms which can potentially happen during nanomannfacturing of these devices have been considered and simulated. Different implementations of QCA logic devices and interconnects are also compared in term of defect tolerance and testability. The same study is performed for new proposed QCA devices too. The simulation results show that additional fault models at logic level must be considered for testing of QCA-based circuits.
Mariam Momenzadeh, Mehdi Baradaran Tahoori, Jing Huang 0001, Fabrizio Lombardi
IPDPS1
2004 Defects and Faults in Quantum Cellular Automata at Nano Scale
abstract
There has been considerable research on quantum dot cellular automata (QCA) as a new computing scheme in the nano-scale regimes. The basic logic element of this technology is majority voter. In this paper, a detailed simulation-based characterization of QCA defects and study of their effects at logic-level are presented. Testing of these devices is investigated and compared with conventional CMOS-based designs. Unique testing features of designs based on this technology are presented and interesting properties have been identified.
Mehdi Baradaran Tahoori, Mariam Momenzadeh, Jing Huang 0001, Fabrizio Lombardi
VTS2
2003 Emulating Shared-Memory Do-All Algorithms in Asynchronous Message-Passing Systems
Dariusz R. Kowalski, Mariam Momenzadeh, Alexander A. Schwarzmann
OPODIS2