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Yung-Hsiang Hung

dblp:57/8526 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2009
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 1 heaviest of 1, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
packaging
0.112009
A Neural Network-Based Prediction Model in Embedded Processes of Gold Wire Bonding Structure for Stacked Die Package · Proc. IEEE 2009

Methods — techniques the papers use, named apart from their topics

neural network prediction model · 0.1
YearPublicationVenuePosition
2009 A Neural Network-Based Prediction Model in Embedded Processes of Gold Wire Bonding Structure for Stacked Die Package
abstract
The trend in the consumer electronics market is to offer lighter, smaller outline, and more functional products, especially for portable products. This trend has pushed electronic packages to be thinner, with a lower profile and with multiple chips in one package. When the package becomes thinner, the space of the package correspondingly becomes an important issue. In order to obtain higher density and thinner package, we have to develop an embedded gold wire bonding assembly technology. It provides a simple structure with a thick adhesive layer to fix the upper layer die and bottom layer die gold wire. The developed technology can use exactly the same die size as for wire bonding interconnections without any additional processing. All electrical connections of the upper and the lower die are achieved by wire bonding to the substrate, independently. We have performed this stacking assembly by precise control of the die attach film layer thickness and low wire loop shape.
Chin-Huang Chang, Yung-Hsiang Hung
Proc. IEEE2