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Lars Sandberg

dblp:58/3177 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1993
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 87% Parallel and multicore computing · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
cache coherence		 0.011993
An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing · ISCA 1993
Memory systems › cache coherence › invalidation
write-invalidate protocol		 0.011993
An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing · ISCA 1993
Parallel and multicore computing › multiprocessor system
shared-memory multiprocessor		 0.011993
An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing · ISCA 1993

Methods — techniques the papers use, named apart from their topics

adaptive coherence protocol · 0.0
YearPublicationVenuePosition
1993 An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing
abstract
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a write-invalidate protocol result in invalidation actions that could be eliminated. For this type of sharing, called migratory sharing, each processor typically causes a cache miss followed by an invalidation request which could be merged with the preceding cache-miss request.
Per Stenström, Mats Brorsson, Lars Sandberg
 ISCA3