This paper reviews the design challenges that current and future processors must face, with stringent power limits and high frequency targets, and the design methods required to overcome the above challenges and address the continuing Giga-scale system integration trend. This paper then describes the details behind the design methodology that was used to successfully implement a first-generation CELL processor - a multi-core SoC. Key features of this methodology are broad optimization with fast rule-based analysis engines using macro-level abstraction for constraints propagation up/down the design hierarchy, coupled with accurate transistor level simulation for detailed analysis. The methodology fostered the modular design concept that is inherent to the CELL architecture, enabling a high frequency design by maximizing custom circuit content through re-use, and balanced power, frequency, and die size targets through global convergence capabilities. The design has roughly 241 million transistors implemented in 90 nm SOI technology with 8 levels of copper interconnects and one local interconnect layer. The chip has been tested at various temperatures, voltages, and frequencies. Correct operation has been observed in the lab on first pass silicon at frequencies well over 4GHz.

This paper presents a method for general reduced order analysis of linear circuits with a large number of independent sources. This type of circuit is used to model the power grid in power supply noise analysis for example. The large size of the linear circuit model renders circuit simulation inefficient. The large number of independent sources makes conventional multi-port model reduction ineffective. In order to address these problems, this paper proposes an extended Krylov subspace method which constructs a transformation matrix based on the dynamics of the circuit as well as the source excitations, thus avoiding the multi-port problem of model reduction. The transformation matrix is then used to reduce the given circuit to a smaller circuit model, which allows for more efficient analysis.

This paper presents a general method for computing transient sensitivities using both direct and adjoint methods in controlled explicit event driven simulation algorithms that employ piecewise linear device models. Sensitivity information provides first order assessment of circuit variability with respect to design variables and parasitics. This information is particularly useful for noise analysis, timing rule generation, and circuit optimization. Techniques for incorporating transient sensitivity into adaptively controlled explicit simulation, a general piecewise linear simulator, are presented. Sensitivity computation includes algorithms to handle instantaneous charge redistribution due to the discontinuous conductance models of the piecewise linear elements, and the loss of simulation accuracy due to the nonmonotonic responses in autonomous adjoint circuits with nonzero initial conditions. Results demonstrate the efficiency and accuracy of the proposed techniques.

This paper presents a general method for computing transient sensitivities using both the direct and adjoint methods in event driven controlled explicit simulation algorithms that employ piecewise linear device models. This transient sensitivity capability is intended to be used in a simulation environment for transistor level analysis and tuning. Results demonstrate the efficiency and accuracy of the proposed techniques. Examples are also presented to illustrate how the transient sensitivity capability is used in timing characterization and circuit tuning.

This paper presents a general method for computing transient sensitivities using the adjoint method in event driven simulation algorithms that employ piecewise linear device models. Sensitivity information provides first order assessment of circuit variability with respect to design variables and parasitics. This information is particularly useful for noise stability analysis, timing rule generation, and circuit optimization. Techniques for incorporating adjoint transient sensitivity into ACES, a general piecewise linear simulator, are presented. Sensitivity computation includes algorithms to handle instantaneous charge redistribution due to the discontinuous conductance models of the piecewise linear elements, and the loss of simulation accuracy due to the non-monotonous responses in autonomous adjoint circuits with non-zero initial conditions. Results demonstrate the efficiency and accuracy of the proposed techniques.

Thispaperpresents a matrLrpartitioning scheme for the simulation of coupling capacitances in timing and noise analysis.An error criten.onsimilar to the local truncation error of integration algorithms was developed to control the error due to this matriv partitioning algorithm.~e major advantage of the algorithm is that it does not require iterations such as required in rela~ation algon.thrns,and it is designed to work with circuit partitioning for eficient simulation of large circuits in fast circuitkiming simulator like ACES [lJ, which firms the basis for an eficient transistor level simulation and analysis.The mattipartitioning algorithm alsofits well with controlled evplicit integration algon"thms.Results demonstrate that the algon.thmcan ensure simulation accuracy without signl~cantly degrading simulation eficiency for the timing and noise analysis of circuits designed in advanced technologies with small feature sizes.

This paper presents a general method for incorporating state transformation in event driven explicit simulation. One inherent assumption in this type of simulation algorithm is the state independence, which allows the algorithm to process the states independently in an event driven manner at the transistor level. Numerical problems arise when an inappropriate state representation of the circuit, in which the states are not truly independent, is chosen. In principle, any similarity transformation of the state equation can be employed to transform the circuit into a more convenient state space for numerical solution. This paper develops a systematic scheme to derive an appropriate state transformation, and to incorporate the state transformulation in such a way to maintain the efficiency of event driven explicit simulation algorithms.

This paper presents a general rational block Lanczos algorithm for computing multipoint matrix Pade approximation of linear multiport networks, which model many important circuits in digital, analog, or mixed signal designs. This algorithm generalizes a novel block Lanczos algorithm with a reliable adaptive scheme for breakdown treatment to address two drawbacks of the single frequency Pade approximation: poor approximation of the transfer function in the frequency domain far away from the expansion point and the instability of the reduced model when the original system is stable. In addition, due to smaller Krylov subspace corresponding to each frequency point, the rational algorithm also alleviates the possible breakdowns when completing high order approximations. The cost of full backward orthogonalization with respect to all previous Lanczos vectors in a rational Lanczos algorithm, as compared to a partial backward orthogonalization in a single point Lanczos algorithm, is offset by more accurate and smaller order approximations.

Abstract- This paper presents an efficient method, based on the transfer function simulation method, for the transient analysis of lossy and dispersive transmission lines terminated by nonlinear circuits. This method combines the efficiency provided by rational function approximation with the accuracy of using modal decomposition. For the task of computing the convolution integral, the transfer function simulation method was found to be more straightforward for implementation and more efficient than the recursive convolution method, thus providing further improvement in simulation efficiency. A robust and efficient method for the analysis of frequency dependent (dispersive) transmission lines is also reported. This method has been implemented in AS/X, IBM production circuit simulator, and has been used routinely for the analysis of practical lossy and dispersive coupled transmission lines. 1.

Article ADAPTS: A digital transient simulation strategy for integrated circuits Share on Authors: Alexander D. Stein Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, Pennsylvania Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PennsylvaniaView Profile , Tuyen V. Nguyen Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, Pennsylvania Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PennsylvaniaView Profile , Binay J. George Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, Pennsylvania Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PennsylvaniaView Profile , Ronald A. Rohrer Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, Pennsylvania Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PennsylvaniaView Profile Authors Info & Claims DAC '91: Proceedings of the 28th ACM/IEEE Design Automation ConferenceJune 1991 Pages 26–31https://doi.org/10.1145/127601.127618Online:01 June 1991Publication History 17citation141DownloadsMetricsTotal Citations17Total Downloads141Last 12 Months2Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access

Both direct and adjoint methods are applied to the computation of time-domain transient sensitivities in the already efficient SPECS piecewise approximate circuit simulation environment. By exploiting the event-driven nature of SPECS, the computation, storage, and interpolation of the Jacobians that specify the appropriate linearized circuit during the forward simulation is not required to obtain sensitivities. Both direct and adjoint methods require only a marginal computational overhead and provide equivalent results. The choice of the method to use depends on the ratio of the number of outputs to the number of parameters. More parameters favor the adjoint method and more outputs favor the direct. The overall efficiency of both SPECS and its time-domain sensitivity extension allows it to be applied to realistic circuits that, due to their large size, had previously made such analysis impractical. Simulation results on industrial circuits of up to 1500 MOS transistors show that transient sensitivities can be efficiently computed for large circuits.>

Transient sensitivity computation in SPECS (simulation program for electronic circuits and systems), which provides a unique capability both to enhance efficiency and to validate simulation results, is described. By using transient sensitivities with respect to the entries of piecewise constant (table) element models and suppressed parasitics, an initially crude and correspondingly quick simulation can be undertaken and then augmented if necessary for improved accuracy. More specifically, table models are refined and parasitics reintroduced only where required in the final analysis as indicated by sensitivity results. This overall approach increases confidence in the results of the SPECS simulation strategy which relies heavily on simplified models for its enhanced efficiency.>