Demo Data from EDBT 2026 / reviewers in the wild / expert
Robert M. McDermott
dblp:59/6135
· DBLP profile ↗
5ranked-venue papers
3as first author
0since 2021 · last 1987
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 5 · 3 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
5 papers |
Electronic design automation · 76% Hardware reliability and fault tolerance · 13% Performance modeling and evaluation · 6% |
Topics — the 13 heaviest of 13, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
hardware verification and test |
0.0 | 2 | 1987 | Switch Directed Dynamic Causal Networks - a Paradigm for Electronic System Diagnosis · DAC 1987 An interactive testability analysis program - ITTAP · DAC 1982 |
Hardware reliability and fault tolerance
system diagnosis |
0.0 | 1 | 1987 | Switch Directed Dynamic Causal Networks - a Paradigm for Electronic System Diagnosis · DAC 1987 |
Electronic design automation
CAD framework |
0.0 | 1 | 1985 | The ITT VLSI design system: CAD integration in a multi-national environment · DAC 1985 |
Electronic design automation › CAD framework
design tool integration |
0.0 | 1 | 1985 | The ITT VLSI design system: CAD integration in a multi-national environment · DAC 1985 |
Electronic design automation
circuit simulation |
0.0 | 1 | 1982 | Transmission gate modeling in an existing three-value simulator · DAC 1982 |
Electronic design automation › hardware verification and test
design for testability |
0.0 | 1 | 1982 | An interactive testability analysis program - ITTAP · DAC 1982 |
Performance modeling and evaluation
simulation |
0.0 | 1 | 1982 | Transmission gate modeling in an existing three-value simulator · DAC 1982 |
Electronic design automation › hardware verification and test
testability analysis |
0.0 | 1 | 1982 | An interactive testability analysis program - ITTAP · DAC 1982 |
Electronic design automation › hardware verification and test
test generation |
0.0 | 1 | 1982 | An interactive testability analysis program - ITTAP · DAC 1982 |
Electronic design automation › hardware verification and test
test length estimation |
0.0 | 1 | 1982 | An interactive testability analysis program - ITTAP · DAC 1982 |
Electronic design automation › hardware verification and test
fault analysis |
0.0 | 1 | 1981 | Random fault analysis · DAC 1981 |
Integrated circuit design
VLSI design |
0.0 | 1 | 1985 | The ITT VLSI design system: CAD integration in a multi-national environment · DAC 1985 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 1982 | Transmission gate modeling in an existing three-value simulator · DAC 1982 |
Methods — techniques the papers use, named apart from their topics
causal networks · 0.0neutral data format · 0.0design rule management · 0.0selective trace · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1987 | Switch Directed Dynamic Causal Networks - a Paradigm for Electronic System DiagnosisabstractElectronic Systems Diagnosis, be it at the Device, Board, or System level, is a complex and time consuming task. Various techniques have been developed to provide design aids to the maintenance technician, each with its own successes and limitations, typically in terms of performance versus complexity issues. This paper demonstrates a novel integration of such techniques to provide for an effective and efficient approach to expert diagnosis of complex systems. Robert M. McDermott, David Stern |
DAC | 1 |
| 1985 | The ITT VLSI design system: CAD integration in a multi-national environmentabstractITT has developed and implemented a flexible CAD system strategy which solves major problems in integrating VLSI design aids. The complexity of current generation VLSI CAD and the proliferation of commercial and internally generated design aids necessitates a coordinated approach to CAD system integration. This need was recognized early at ITT where it is compounded by a multi-national design environment comprising 14 major VLSI design centers and a growing number of smaller design centers each with its own specific set of needs and constraints. The CAD system integration strategy described achieves flexibility through a neutral data format tool interface architecture, a software language standard, and multi-source-able design rules. The paper describes the strategy and the semi-custom and full custom design systems developed following the strategy. N. J. Elias, R. J. Byrne, A. D. Close, Robert M. McDermott |
DAC | 4 |
| 1982 | An interactive testability analysis program - ITTAPabstractITTAP is a testability analysis program developed at the ITT-LSI technology center. In this paper we describe a testability measure for the test length and discuss the use of the selective trace concept for testability calculations. It is shown that ITTAP provides an order of magnitude improvement in run time over existing programs like SCOAP. Deepak K. Goel, Robert M. McDermott |
DAC | 2 |
| 1982 | Transmission gate modeling in an existing three-value simulator
Robert M. McDermott |
DAC | 1 |
| 1981 | Random fault analysis
Robert M. McDermott |
DAC | 1 |