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Weiyi Zhang 0003

dblp:59/803-3 · DBLP profile ↗
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2ranked-venue papers
2as first author
1since 2021 · last 2023
0000-0003-4915-1080ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 39% Integrated circuit design · 30% Electronic design automation · 30%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems › discrete event systems
colored petri nets
0.712023
Designing, Modeling and Analysis of GALS Software Systems · IEEE Trans. Software Eng. 2023
Electronic design automation › hardware verification and test
formal verification
0.712023
Designing, Modeling and Analysis of GALS Software Systems · IEEE Trans. Software Eng. 2023
Integrated circuit design › asynchronous circuit design
globally asynchronous locally synchronous design
0.712023
Designing, Modeling and Analysis of GALS Software Systems · IEEE Trans. Software Eng. 2023
Embedded and real-time systems › cyber-physical system platforms
industrial automation
0.212023
Designing, Modeling and Analysis of GALS Software Systems · IEEE Trans. Software Eng. 2023

Methods — techniques the papers use, named apart from their topics

computation tree logic · 0.7coloured petri nets · 0.7
YearPublicationVenuePosition
2023 Designing, Modeling and Analysis of GALS Software Systems
abstract
Designing software systems underpinned by a formal model of computation (MoC) is crucial for safety-critical, real-time and all industrial applications as it allows formal analysis of those designs and support for correct by design systems. In this paper, we focus on Globally Asynchronous Locally Synchronous (GALS) software systems and Coloured Petri Nets (CPNs) based approach to formally model and analyse GALS software systems specified in SystemJ GALS programming language. The approach translates SystemJ constructs into CPN modules and composes them into CPN GALS model based on control flow and concurrency specified in the SystemJ program. It preserves GALS MoC by automatically integrating synchronizer modules, asynchronous channel interface modules, and scheduling modules to result in the execution model of SystemJ program equivalent CPN. The created CPN GALS model allows system developers to verify the properties of the design formally with the use of Computation Tree Logic (CTL). An industrial automation example is provided as a use case.
Weiyi Zhang 0003, Zoran A. Salcic, Avinash Malik
IEEE Trans. Software Eng.1
2019 Towards Formal Modeling and Analysis of SystemJ GALS Systems using Coloured Petri Nets
abstract
SystemJ is a programming language developed for implementing safety critical cyber-physical systems, including industrial automation systems. However, the current tools do not support an efficient mechanism to verify SystemJ programs formally. This paper presents a semantics-preserving translation of the synchronous subset of SystemJ to Coloured Petri Net (CPN), which in turn enables leveraging the plethora of analysis and verification tools for CPN to verify SystemJ programs. The translation and verification approach is illustrated on a pedagogical industrial automation example of a SystemJ program.
Weiyi Zhang 0003, Zoran A. Salcic, Avinash Malik
INDIN1