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Sarah Knepper

dblp:59/9983 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 2017
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Theory of computation · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
High-performance computing · 77% Parallel and multicore computing · 23%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
High-performance computing
numerical linear algebra
0.312017
Designing vector-friendly compact BLAS and LAPACK kernels · SC 2017
Parallel and multicore computing › data parallelism
SIMD vectorization
0.112017
Designing vector-friendly compact BLAS and LAPACK kernels · SC 2017

Methods — techniques the papers use, named apart from their topics

batched kernel · 0.3SIMD vectorization · 0.3
YearPublicationVenuePosition
2017 Optimizing Matrix Multiplication on Intel® Xeon Phi TH x200 Architecture
abstract
Matrix multiplication is ubiquitous in scientific computing. From computational science to machine learning, a large and diverse set of applications rely on the performance of general matrix-matrix multiplication (GEMM) subroutines. The Intel®Math Kernel Library(R) provides highly optimized GEMM subroutines that take full advantage of the available parallelism and vectorization in both Intel®Xeon®and Intel®Xeon Phi(TM) processors. In this paper we discuss the optimization of GEMM subroutines for the Intel®Xeon PhiTMx200 (code-named Knights Landing).
Murat Efe Guney, Kazushige Goto, Timothy B. Costa, Sarah Knepper, Louise Huot, Arthur Mitrano, Shane Story
ARITH4
2017 Designing vector-friendly compact BLAS and LAPACK kernels
abstract
Many applications, such as PDE based simulations and machine learning, apply blas/lapack routines to large groups of small matrices. While existing batched blas APIs provide meaningful speedup for this problem type, a non-canonical data layout enabling cross-matrix vectorization may provide further significant speedup. In this paper, we propose a new compact data layout that interleaves matrices in blocks according to the SIMD vector length. We combine this compact data layout with a new interface to blas/lapack routines that can be used within a hierarchical parallel application. Our layout provides up to 14X, 45X, and 27X speedup against OpenMP loops around optimized dgemm, dtrsm and dgetrf kernels, respectively, on the Intel Knights Landing architecture. We discuss the compact batched blas/lapack implementations in two libraries, KokkosKernels and Intel® Math Kernel Library. We demonstrate the APIs in a line solver for coupled PDEs. Finally, we present detailed performance analysis of our kernels.
Kyungjoo Kim, Timothy B. Costa, Mehmet Deveci, Andrew M. Bradley, Simon D. Hammond, Murat Efe Guney, Sarah Knepper, Shane Story, Sivasankaran Rajamanickam
SC7