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Charles W. Gwyn

dblp:60/2791 · DBLP profile ↗
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6ranked-venue papers
2as first author
0since 2021 · last 1982
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
5 papers
Electronic design automation · 91% Integrated circuit design · 9%

Topics — the 7 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
physical design
0.021978
Methods for hierarchical automatic layout of custom LSI circuit masks · DAC 1978
Automatic circuit analysis based on mask information · DAC 1976
Electronic design automation › design automation tools
VLSI CAD
0.011980
Design automation trends for VLSI in the 1980s (Position Statement) · DAC 1980
Electronic design automation › physical design › VLSI layout
custom LSI layout
0.011978
Methods for hierarchical automatic layout of custom LSI circuit masks · DAC 1978
Integrated circuit design
VLSI design
0.021982
CAD Systems for IC Design · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1982
Design automation trends for VLSI in the 1980s (Position Statement) · DAC 1980
Electronic design automation
hardware verification and test
0.011976
Automatic circuit analysis based on mask information · DAC 1976
Electronic design automation › physical design
layout verification
0.011976
Automatic circuit analysis based on mask information · DAC 1976
Electronic design automation › physical design
parasitic extraction
0.011976
Automatic circuit analysis based on mask information · DAC 1976

Methods — techniques the papers use, named apart from their topics

hierarchical design methodology · 0.0pattern recognition · 0.0logical operations · 0.0
YearPublicationVenuePosition
1982 CAD Systems for IC Design
abstract
As integrated circuit (IC) complexities increase, many existing computer-aided design (CAD) methods must be replaced with an integrated design system to support very large scale integrated (VLSI) circuit and system design. The framework for a hierarchical CAD system is described. The system supports both functional and physical design from initial specification and system synthesis to simulation, mask layout, verification, and documentation. The system is being implemented in phases on a DECSystem 20 computer network and will support evolutionary changes as new technologies are developed and design strategies defined.
Marvin E. Daniel, Charles W. Gwyn
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
1981 Government interest and involvement in DA from the Sandia viewpoint
Charles W. Gwyn
DAC1
1981 Government interest and involvement in design automation development (Panel Discussion)
Ronald Waxman, Jonathan Allen, Robert W. Dutton, John M. Gould, Charles W. Gwyn, Paul Losleben, Dan C. Nash, Lawrence Sumney, H. Wayne Spence
DAC5
1980 Design automation trends for VLSI in the 1980s (Position Statement)
abstract
Substantial progress was made in implementing design aids during the 1970s; however, the development of new aids must be accelerated during the 1980s to support circuit designs of VLSI complexity. New design aids-will be required because of (1) increased design complexity, (2) scarcity of design engineers, (3) need to reduce circuit design time and cost, and (4) increased emphasis in producing error-free manufacturable designs. The reduction of fabrication costs will become more important as processing equipment costs and the sophistication of individual processing steps continues to increase to support VLSI complexity circuits. These design and manufacturing problems can be solved only by increasing the use of design automation and improving the design aids.
Charles W. Gwyn
DAC1
1978 Methods for hierarchical automatic layout of custom LSI circuit masks
Bryan Preas, Charles W. Gwyn
DAC2
1976 Automatic circuit analysis based on mask information
abstract
A Circuit MAsk Translator (CMAT) code has been developed which converts integrated circuit mask information into a circuit schematic. Logical operations, pattern recognition, and special functions are used to identify and interconnect diodes, transistors, capacitors, and resistances. The circuit topology provided by the translator is compatible with the input required for a circuit analysis program.
Bryan Preas, Wray L. Buntine, Charles W. Gwyn
DAC3