Demo Data from EDBT 2026 / reviewers in the wild / expert
George R. Wilson
dblp:60/5471
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1990
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
digital circuit design |
0.0 | 1 | 1990 | Advances in bipolar VLSI · Proc. IEEE 1990 |
Integrated circuit design › digital circuit design › logic families
emitter coupled logic |
0.0 | 1 | 1990 | Advances in bipolar VLSI · Proc. IEEE 1990 |
Integrated circuit design › semiconductor technology › semiconductor process technology
BiCMOS technology |
0.0 | 1 | 1990 | Advances in bipolar VLSI · Proc. IEEE 1990 |
Integrated circuit design
low-power circuit design |
0.0 | 1 | 1990 | Advances in bipolar VLSI · Proc. IEEE 1990 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1990 | Advances in bipolar VLSIabstractBipolar IC processes are reviewed, and the impact of BiCMOS technology on bipolar VLSI is discussed. The discussion covers standard emitter-coupled-logic (ECL) circuit configuration, on-chip line driving, output circuitry, series gating, ECL versus CML (current-mode logic), differential logic, noise margins, interconnect capacitance, bipolar VLSI transistor design and scaling, and processes for ECL VLSI.> George R. Wilson |
Proc. IEEE | 1 |