Demo Data from EDBT 2026 / reviewers in the wild / expert
Richard J. Spillman
dblp:61/2317
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1977
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test › test generation
d-algorithm |
0.0 | 1 | 1977 | Detection of Single, Stuck-Type Faulures in Multivalued Combinational Networks · IEEE Trans. Computers 1977 |
Electronic design automation › hardware verification and test
fault detection |
0.0 | 1 | 1977 | Detection of Single, Stuck-Type Faulures in Multivalued Combinational Networks · IEEE Trans. Computers 1977 |
Electronic design automation
hardware verification and test |
0.0 | 1 | 1977 | Detection of Single, Stuck-Type Faulures in Multivalued Combinational Networks · IEEE Trans. Computers 1977 |
Electronic design automation › hardware verification and test › fault detection
stuck-at fault detection |
0.0 | 1 | 1977 | Detection of Single, Stuck-Type Faulures in Multivalued Combinational Networks · IEEE Trans. Computers 1977 |
Electronic design automation › hardware verification and test
test generation |
0.0 | 1 | 1977 | Detection of Single, Stuck-Type Faulures in Multivalued Combinational Networks · IEEE Trans. Computers 1977 |
Methods — techniques the papers use, named apart from their topics
generalized ternary algebra · 0.0d-algorithm · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1977 | Detection of Single, Stuck-Type Faulures in Multivalued Combinational NetworksabstractThis paper examines the problem of detecting single stuck-type faults in multivalued combinational circuits. The algebra employed is the generalized ternary algebra developed by Vranesic, Lee, and Smith. Many of the concepts already developed for fault detection in binary circuits generalized easily to the multivalued case. The special properties of multivalued circuits for this algebra simplifies fault detection. Specifically, this paper introduces the concept of a partially enabled gate, K-paths in combinational circuits and a new notation for multivalued fault detection. In addition, a modified form of the D-algorithm is developed for fault detection in multivalued circuits as well as a δ algorithm for the simplification of multivalued test sets. Richard J. Spillman, Stephen Y. H. Su |
IEEE Trans. Computers | 1 |