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I-Che Chen

dblp:62/11467 · DBLP profile ↗
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4ranked-venue papers
1as first author
0since 2021 · last 2015
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Electronic design automation · 100%
Interdisciplinary, comprehensive, and emerging computing
1 paper
Computational science and engineering · 100%
Theoretical computer science
1 paper
Computational geometry · 100%

Topics — the 6 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
physical design
0.532014
Efficient Multilayer Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Geometric Reduction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2014
An Efficient Bi-criteria Flow Channel Routing Algorithm For Flow-based Microfluidic Biochips · DAC 2014
An efficient algorithm for multi-layer obstacle-avoiding rectilinear Steiner tree construction · DAC 2012
Electronic design automation › physical design
routing
0.432014
Efficient Multilayer Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Geometric Reduction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2014
An Efficient Bi-criteria Flow Channel Routing Algorithm For Flow-based Microfluidic Biochips · DAC 2014
An efficient algorithm for multi-layer obstacle-avoiding rectilinear Steiner tree construction · DAC 2012
Electronic design automation › physical design › routing › steiner tree construction
rectilinear steiner tree
0.422014
Efficient Multilayer Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Geometric Reduction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2014
An Efficient Bi-criteria Flow Channel Routing Algorithm For Flow-based Microfluidic Biochips · DAC 2014
Electronic design automation › physical design › routing
steiner tree construction
0.112012
An efficient algorithm for multi-layer obstacle-avoiding rectilinear Steiner tree construction · DAC 2012
Computational science and engineering
microfluidic device
0.112014
An Efficient Bi-criteria Flow Channel Routing Algorithm For Flow-based Microfluidic Biochips · DAC 2014
Electronic design automation › physical design › routing › VLSI routing
obstacle-avoiding routing
0.012012
An efficient algorithm for multi-layer obstacle-avoiding rectilinear Steiner tree construction · DAC 2012

Methods — techniques the papers use, named apart from their topics

steiner point selection · 0.4obstacle-avoiding routing · 0.4kruskal algorithm · 0.4geometric reduction · 0.4bi-criteria optimization · 0.4reduction · 0.1computational geometry · 0.1
YearPublicationVenuePosition
2015 Low-Area and High-Speed Approximate Matrix-Vector Multiplier
abstract
Matrix multiplication is a high-cost operation that can benefit from efficient hardware implementation. Approximate computing offers a promising way to lower the hardware costs and to speed up the computation by leveraging the error tolerance of applications like image processing. This work proposes a novel approximate matrix-vector multiplier which features low area and high speed. Moreover, its accuracy is dynamically reconfigurable, allowing the user to trade small errors for increased speed. Compared to previous designs, our approach reduces the area cost up to 70% with a 5% average error. With a more relaxed 10% error constraint, it achieves a speedup of 2x. We apply the proposed design to color transformation, a basic operation in face-detection algorithms. The approximate transformed images exhibit only a small decrease in detection accuracy.
I-Che Chen, John P. Hayes
DDECS1
2014 An Efficient Bi-criteria Flow Channel Routing Algorithm For Flow-based Microfluidic Biochips
abstract
Rapid growth in capacity makes flow-based microfluidic biochips a promising candidate for biochemical analysis because they can integrate more complex functions. However, as the number of components grows, the total length of flow channels between components must increase exponentially. Recent empirical studies show that long flow channels are vulnerable due to blocking and leakage defects. Thus, it is desirable to minimize the total length of flow channels for robustness. Also, for timing-sensitive biochemical assays, increase in the longest length of flow channel will delay the assay completion time and lead to variation of fluid, thereby affecting the correctness of outcome. The increasing number of components, including the pre-placed components, on the chip makes the flow channel routing problem even more complicated. In this paper, we propose an efficient obstacle-avoiding rectilinear Steiner minimum tree algorithm to deal with flow channel routing problem in flow-based microfluidic biochips. Based on the concept of Kruskal algorithm and formulating the considerations as a bi-criteria function, our algorithm is capable of simultaneously minimizing the total length and the longest length of flow channel.
Chun-Xun Lin, Chih-Hung Liu 0001, I-Che Chen, D. T. Lee, Tsung-Yi Ho
DAC3
2014 Efficient Multilayer Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Geometric Reduction
abstract
Given a set of pin-vertices, an obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) connects all the pin-vertices possibly through Steiner points using vertical and horizontal segments with the minimal wirelength and without intersecting any obstacle. To deal with multiple routing layers and preferred routing orientations, we consider the multilayer obstacle-avoiding rectilinear Steiner minimal tree (ML-OARSMT) problem and the obstacle-avoiding preferred direction Steiner tree (OAPD-ST) problem. First, we prove that the multilayer case is theoretically different from the 2D one, and propose a reduction to transform a multilayer instance into a 3D instance. Based on the reduction, we apply computational geometry techniques to develop an efficient algorithm, utilizing existing OARSMT heuristics, for the ML-OARSMT problem and the OAPD-ST problem. Furthermore, we develop an advanced Steiner point selection to avoid inferior Steiner points and to improve the solution quality. Experimental results show that our algorithm provides a solution with excellent quality and has a significant speed-up compared to previously known results.
Chih-Hung Liu 0001, Chun-Xun Lin, I-Che Chen, D. T. Lee, Ting-Chi Wang
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
2012 An efficient algorithm for multi-layer obstacle-avoiding rectilinear Steiner tree construction
abstract
We consider the multi-layer obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) problem and propose a reduction to transform a multi-layer instance into a 3D instance. Based on the reduction we apply computational geometry techniques to develop an efficient algorithm, utilizing existing OARSMT heuristics. Experimental results show that our algorithm provides a solution with excellent quality and has a significant speed-up compared to previously known results.
Chih-Hung Liu 0001, I-Che Chen, D. T. Lee
DAC2