Demo Data from EDBT 2026 / reviewers in the wild / expert
Junchul Choi
dblp:62/11471
· DBLP profile ↗
8ranked-venue papers
6as first author
0since 2021 · last 2019
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 7 · 6 first-authorSoftware engineering, systems software and programming languages · 2 · 2 first-authorApplied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Embedded and real-time systems · 82% Parallel and multicore computing · 9% Electronic design automation · 9% |
Topics — the 9 heaviest of 9, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Embedded and real-time systems
real-time scheduling |
0.3 | 2 | 2013 | A novel analytical method for worst case response time estimation of distributed embedded systems · DAC 2013 An ILP-based Worst-case Performance Analysis Technique for Distributed Real-time Embedded Systems · RTSS 2012 |
Embedded and real-time systems › real-time scheduling › schedulability analysis
response time analysis |
0.3 | 2 | 2013 | A novel analytical method for worst case response time estimation of distributed embedded systems · DAC 2013 An ILP-based Worst-case Performance Analysis Technique for Distributed Real-time Embedded Systems · RTSS 2012 |
Embedded and real-time systems › networked embedded systems
distributed embedded systems |
0.2 | 1 | 2013 | A novel analytical method for worst case response time estimation of distributed embedded systems · DAC 2013 |
Embedded and real-time systems
distributed real-time systems |
0.1 | 1 | 2012 | An ILP-based Worst-case Performance Analysis Technique for Distributed Real-time Embedded Systems · RTSS 2012 |
Embedded and real-time systems
embedded system design |
0.1 | 1 | 2012 | Executing synchronous dataflow graphs on a SPM-based multicore architecture · DAC 2012 |
Embedded and real-time systems › real-time scheduling
multicore scheduling |
0.1 | 1 | 2012 | Executing synchronous dataflow graphs on a SPM-based multicore architecture · DAC 2012 |
Embedded and real-time systems › embedded software › embedded operating systems › embedded memory management
scratchpad memory management |
0.1 | 1 | 2012 | Executing synchronous dataflow graphs on a SPM-based multicore architecture · DAC 2012 |
Parallel and multicore computing › dataflow computing › dataflow scheduling
synchronous dataflow scheduling |
0.1 | 1 | 2012 | Executing synchronous dataflow graphs on a SPM-based multicore architecture · DAC 2012 |
Electronic design automation
timing analysis |
0.1 | 1 | 2012 | An ILP-based Worst-case Performance Analysis Technique for Distributed Real-time Embedded Systems · RTSS 2012 |
Methods — techniques the papers use, named apart from their topics
static analysis · 0.1scheduling heuristic · 0.1prefetching · 0.1integer linear programming · 0.1evolutionary algorithm · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2019 | Optimization of Fault-Tolerant Mixed-Criticality Multi-Core Systems with Enhanced WCRT AnalysisabstractThis article proposes a novel optimization technique of fault-tolerant mixed-criticality multi-core systems with worst-case response time (WCRT) guarantees. Typically, in fault-tolerant multi-core systems, tasks can be replicated or re-executed in order to enhance the reliability. In addition, based on the policy of mixed-criticality scheduling, low-criticality tasks can be dropped at runtime. Such uncertainties caused by hardening and mixed-criticality scheduling make WCRT analysis very difficult. We show that previous analysis techniques are pessimistic as they consider avoidably extreme cases that can be safely ignored within the given reliability constraint. We improve the analysis in order to tighten the pessimism of WCRT estimates by considering the maximum number of faults to be tolerated. Further, we improve the mixed-criticality scheduling by allowing partial dropping of low-criticality tasks. On top of those, we explore the design space of hardening, task-to-core mapping, and quality-of-service of the multi-core mixed-criticality systems. The effectiveness of the proposed technique is verified by extensive experiments with synthetic and real-life benchmarks. Junchul Choi, Hoeseok Yang, Soonhoi Ha |
ACM Trans. Design Autom. Electr. Syst. | 1 |
| 2018 | End-to-end latency analysis of cause-effect chains in an engine management systemabstractAn engine management system consists of periodic or sporadic real-time tasks. A task is a set of runnables that may be fully preemptive or partially at runnable boundaries. A cause-effect chain is defined as a chain of runnables that are connected by the read/write dependency. We propose a novel analytical technique to estimate the end-to-end latency of a cause-effect chain by considering conservatively estimated schedule time bounds of associated runnables. The proposed approach is verified with an industrial-strength automotive benchmark. Junchul Choi, Soonhoi Ha |
DATE | 1 |
| 2018 | A hybrid performance analysis technique for distributed real-time embedded systems
Junchul Choi, Hyunok Oh, Soonhoi Ha |
Real Time Syst. | 1 |
| 2017 | Worst-Case Response Time Analysis of a Synchronous Dataflow Graph in a Multiprocessor System with Real-Time TasksabstractIn this article, we propose a novel technique that estimates a tight upper bound of the worst-case response time (WCRT) of a synchronous dataflow (SDF) graph when the SDF graph shares processors with other real-time tasks. When an SDF graph is executed at runtime under a self-timed or static assignment scheduling policy on a multi-processor system, static scheduling of the SDF graph does not guarantee the satisfaction of latency constraints since changes to the schedule may result in timing anomalies. To estimate the WCRT of an SDF graph with a given mapping and scheduling result, we first construct a task instance dependency graph that depicts the dependency between node executions in a static schedule. The proposed technique combines two techniques in a novel way: schedule time bound analysis and response time analysis. The former is used to consider the interference between task instances in the same SDF graph, and the latter is used to consider the interference from other real-time tasks. Through extensive experiments with synthetic examples and benchmarks, we verify the superior performance of the proposed technique compared to other existent techniques. Junchul Choi, Soonhoi Ha |
ACM Trans. Design Autom. Electr. Syst. | 1 |
| 2016 | Conservative modeling of shared resource contention for dependent tasks in partitioned multi-core systems
Junchul Choi, Soonhoi Ha |
DATE | 1 |
| 2013 | A novel analytical method for worst case response time estimation of distributed embedded systemsabstractIn this paper, we propose a novel analytical method, called scheduling time bound analysis, to find a tight upper bound of the worst-case response time in a distributed real-time embedded system, considering execution time variations of tasks, jitter of input arrivals, and scheduling anomaly behavior in a multi-tasking system all together. By analyzing the graph topology and worst-case scheduling scenarios, we measure the conservative scheduling time bound of each task. The proposed method supports an arbitrary mixture of preemptive and non-preemptive processing elements. Its speed is comparable to compositional approaches while it gives a much tighter bound. The advantages of the proposed approach compared with related work were verified by experimental results with randomly generated task graphs and a real-life automotive application. Hyunok Oh, Junchul Choi, Hyojin Ha, Soonhoi Ha |
DAC | 3 |
| 2012 | Executing synchronous dataflow graphs on a SPM-based multicore architectureabstractIn this paper we are concerned about executing synchronous dataflow (SDF) applications on a multicore architecture where a core has a limited size of scratchpad memory (SPM). Unlike traditional multi-processor scheduling of SDF graphs, we consider the SPM size limitation that incurs code and data overlay overhead. Since the scheduling problem is intractable, we propose an EA(evolutionary algorithm)-based technique. To hide memory latency, prefetching is aggressively performed in the proposed technique. The experimental results show that our approach reduces the overlay overhead significantly compared to a non-optimized approach and the previous approach. Junchul Choi, Hyunok Oh, Sungchan Kim, Soonhoi Ha |
DAC | 1 |
| 2012 | An ILP-based Worst-case Performance Analysis Technique for Distributed Real-time Embedded SystemsabstractFinding a tight upper bound of the worst-case response time in a distributed real-time embedded system is a very challenging problem since we have to consider execution time variations of tasks, jitter of input arrivals, scheduling anomaly behavior in a multi-tasking system, all together. In this paper, we translate the problem as an optimization problem and propose a novel solution based on ILP (Integer Linear Programming). In the proposed technique, we formulate a set of ILP formulas in a compositional way for modeling flexibility, but solve the problem holistically to achieve tighter upper bounds. To mitigate the time complexity of the ILP method, we perform static analysis based on a scheduling heuristic to reduce the number of variables and confine the variable ranges. Preliminary experiments with the benchmarks used in the related work and a real-life example show promising results that give tight bounds in an affordable solution time. Hyunok Oh, Hyojin Ha, Shin-Haeng Kang, Junchul Choi, Soonhoi Ha |
RTSS | 5 |