Demo Data from EDBT 2026 / reviewers in the wild / expert
Honda Shing
dblp:62/4459
· DBLP profile ↗
5ranked-venue papers
3as first author
0since 2021 · last 1993
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 5 · 3 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Parallel and multicore computing · 37% Memory systems · 21% Interconnection networks and networks-on-chip · 21% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Interconnection networks and networks-on-chip
multiprocessor interconnection |
0.0 | 1 | 1991 | A conflict-free memory design for multiprocessors · SC 1991 |
Distributed systems › concurrency control
process synchronization |
0.0 | 1 | 1991 | A conflict-free memory design for multiprocessors · SC 1991 |
Parallel and multicore computing
parallel programming models |
0.0 | 1 | 1990 | Resource binding - a universal approach to parallel programming · SC 1990 |
Parallel and multicore computing › synchronization
synchronization mechanisms |
0.0 | 1 | 1990 | Resource binding - a universal approach to parallel programming · SC 1990 |
Methods — techniques the papers use, named apart from their topics
conflict-free memory design · 0.0resource binding · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1993 | A Novel Approach to the Design of Scalable Shared-Memory MultiprocessorsabstractThis paper presents the Conflict-Free Mem ory (CFM) architecture for designing scalable sharedmemory multiprocessors. For a single-level CFM archi tecture, the architecture improves multiprocessor perfor mance by eliminating memory and interconnection net work contention and reducing network latency. A hierar chical CFM architecture is introduced in this paper, which presents a new approach in implementing scalable sharedmemory multiprocessors. An invalidation-based write-back cache protocol is proposed for the CFM architecture. This cache coherence protocol preserves the low storage overhead of snoopy cache protocols, while it offers the high scalability of directory-based protocols. Furthermore, with the CFM cache protocol, efficient synchronization operations can be implemented. Honda Shing, Lionel M. Ni |
ICPP (1) | 1 |
| 1991 | A conflict-free memory design for multiprocessorsabstractThe authors introduce a novel scheme of shared memory organization and interconnection network structure which supports conflict-free accesses to the shared memory in multiprocessors. This scheme also provides a low latency and low cost mechanism for process synchronization. The hot spot problem observed in many multiprocessors can easily be eliminated with this memory organization and interconnection network structure. Extensions to the architecture for supporting large-scale multiprocessors are discussed. It is demonstrated how data consistency can be maintained among concurrent accesses to the same location in a shared memory. In addition, higher level process synchronization supports based on the conflict-free memory architecture are explained. Honda Shing, Lionel M. Ni |
SC | 1 |
| 1991 | Resource Contention in Shared-Memory Multiprocessors: A Parameterized Performance Degradation Model
Arun K. Nanda, Honda Shing, Ten H. Tzen, Lionel M. Ni |
J. Parallel Distributed Comput. | 2 |
| 1990 | A Replicate Workload Framework to Study Performance Degradation in Shared-Memory Multiprocessors
Arun K. Nanda, Honda Shing, Ten H. Tzen, Lionel M. Ni |
ICPP (1) | 2 |
| 1990 | Resource binding - a universal approach to parallel programmingabstractThe authors present a parallel programming paradigm, resource binding, which offers an architecture-independent environment for various parallel computation models. The resource binding technique, with a simple set of primitives, enables a flexible and consistent way of handling process synchronization, shared resource management, and other problems in parallel programming. High portability can be maintained without losing performance. For a clear introduction to the technique, comparisons are made among resource binding and other well-defined schemes such as semaphore, monitor, message passing, and Linda.> Honda Shing, Lionel M. Ni |
SC | 1 |