Demo Data from EDBT 2026 / reviewers in the wild / expert
Ira Pramanick
dblp:62/5376
· DBLP profile ↗
12ranked-venue papers
9as first author
0since 2021 · last 2005
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 11 · 9 first-authorSecurity and privacy · 3Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
4 papers |
Electronic design automation · 48% Parallel and multicore computing · 36% Distributed systems · 14% | |
| Theoretical computer science
3 papers |
Graph algorithms and graph theory · 56% Algorithms and data structures · 22% Mathematical optimization · 22% |
Topics — the 12 heaviest of 15, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing › parallel algorithms › parallel search
parallel heuristic search |
0.0 | 2 | 1995 | An Inherently Parallel Method for Heuristic Problem-Solving: Part II-Example Applications · IEEE Trans. Parallel Distributed Syst. 1995 An Inherently Parallel Method for Heuristic Problem-Solving: Part I-General Framework · IEEE Trans. Parallel Distributed Syst. 1995 |
Mathematical optimization
combinatorial optimization |
0.0 | 1 | 1995 | An Inherently Parallel Method for Heuristic Problem-Solving: Part II-Example Applications · IEEE Trans. Parallel Distributed Syst. 1995 |
Graph algorithms and graph theory
vertex cover |
0.0 | 1 | 1995 | An Inherently Parallel Method for Heuristic Problem-Solving: Part II-Example Applications · IEEE Trans. Parallel Distributed Syst. 1995 |
Electronic design automation › hardware verification and test
delay fault testing |
0.0 | 1 | 1994 | Distributed Solutions to the Delay Fault Test Quality Evaluation Problem · HPDC 1994 |
Electronic design automation › hardware verification and test
fault coverage |
0.0 | 1 | 1994 | Distributed Solutions to the Delay Fault Test Quality Evaluation Problem · HPDC 1994 |
Electronic design automation › hardware verification and test
fault simulation |
0.0 | 1 | 1994 | Distributed Solutions to the Delay Fault Test Quality Evaluation Problem · HPDC 1994 |
Electronic design automation
hardware verification and test |
0.0 | 1 | 1994 | Distributed Solutions to the Delay Fault Test Quality Evaluation Problem · HPDC 1994 |
Distributed systems
distributed algorithms |
0.0 | 1 | 1993 | Distributed Computing Solutions to the All-Pairs Shortest Path Problem · HPDC 1993 |
Graph algorithms and graph theory › shortest path
all-pairs shortest paths |
0.0 | 1 | 1993 | Distributed Computing Solutions to the All-Pairs Shortest Path Problem · HPDC 1993 |
Graph algorithms and graph theory › graph algorithms › path problems
shortest path algorithms |
0.0 | 1 | 1993 | Distributed Computing Solutions to the All-Pairs Shortest Path Problem · HPDC 1993 |
Parallel and multicore computing › parallel algorithms › parallel search
parallel branch-and-bound |
0.0 | 1 | 1995 | An Inherently Parallel Method for Heuristic Problem-Solving: Part I-General Framework · IEEE Trans. Parallel Distributed Syst. 1995 |
High-performance computing › cluster computing
network of workstations |
0.0 | 1 | 1993 | Distributed Computing Solutions to the All-Pairs Shortest Path Problem · HPDC 1993 |
Methods — techniques the papers use, named apart from their topics
parallel dynamic interaction · 0.1empirical study · 0.0empirical evaluation · 0.0performance measurement · 0.0distributed algorithm design · 0.0theoretical analysis · 0.0distributed algorithm · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2005 | Dependability Benchmarking of Computing Systems - Panel StatementabstractThe importance of benchmarking is increasing as every aspect of human life is relying on correct operation of computing systems. Although considerable efforts have been made, presently there are no widely accepted dependability benchmarks. The panelists, in the order shown above, address benchmarking of computer hardware, operating systems, applications, and systems. Cristian Constantinescu, Karama Kanoun, Henrique Madeira, Brendan Murphy, Ira Pramanick, Aaron B. Brown |
DSN | 5 |
| 2004 | The System Recovery BenchmarkabstractWe describe a benchmark for measuring system recovery on a nonclustered standalone system. A system's ability to recover from an outage quickly is a critical factor in overall system availability. General purpose computer systems, such as UNIX based systems, tend to execute the same sequence or series of steps during system startup and outage recovery. Our experience has shown that these steps are consistent, reproducible and measurable, and can thus be benchmarked. Additionally, the factors that create variability in restart/recovery can be bound and represented in a meaningful way. A defined set of measurements, coupled with a specification for representing the results and system variables, provide the foundation for system recovery benchmarking. James Mauro, Ira Pramanick |
PRDC | 3 |
| 2003 | A System Recovery Benchmark for ClustersabstractHigh availability clusters are becoming increasingly common in IT environments today, and the level of availability offered by such systems is a key factor used in their evaluation. However, no systematic and consistent methodology exists to perform such an assessment. Thus there is a critical need to establish cluster availability benchmarks. This paper proposes a cluster availability benchmark, SRB-X, that measures the automatic recovery time of a cluster framework in the event of a cluster node failure. SRB-X is a repeatable and portable benchmark, that measures a common outage mode for high availability clusters. After listing the main requirements of the underlying system recovery benchmark framework, this paper describes the various properties of SRB-X. The calculation of the SRB-X metric is illustrated through two examples. Ira Pramanick, James Mauro |
CLUSTER | 1 |
| 2003 | Robustness Benchmarking for Hardware Maintenance EventsabstractThis paper proposes a method to measure a specific aspect of a system's robustness - the handling of maintenance events. Past research in the area of robustness benchmarking has focused exclusively on injecting a realistic faultload into a system and examining the system's robustness against the set of injected faults. However, faults are not the only events that can cause a system outage. Maintenance events, such as the replacement of a failed hardware component or the installation of a software patch, may also result in a system outage. In this paper, we describe a benchmark for measuring a system's robustness against a class of hardware maintenance events. James Mauro, Ira Pramanick |
DSN | 3 |
| 1995 | Parallel Delay Fault Coverage and Test Quality EvaluationabstractAn efficient fault simulation based evaluation methodology for the determination of fault coverages and test set quality is a practical way to obtain a set of high quality gate delay fault detecting tests. Unfortunately, the methodology is computationally intensive enough to be intractable for reasonably large VLSI circuits. An attractive alternative for speeding up these computation algorithms is parallel processing. In this paper, we present, for the first time, parallel algorithms for gate delay fault simulation and fault coverage determination through test quality evaluation. These algorithms are theoretically analyzed, and experimental studies of their implementation are reported. Studies of load balancing schemes for these algorithms are also presented. The results conform to the theoretically predicted performance, with speedups of up to 12 being obtained for 15 processors. Ira Pramanick, Ankan K. Pramanick |
ITC | 1 |
| 1995 | An Inherently Parallel Method for Heuristic Problem-Solving: Part I-General FrameworkabstractThe class of NP-hard problems contains many problems of considerable practical importance. The complexity of these problems is so overwhelming that exhaustive search of the solution space is not possible even using massively parallel search techniques, particularly for problems of super-exponential complexity such as flow-shop and job-shop scheduling. This two-part paper discusses a novel, inherently parallel heuristic solution technique. Part I presents this technique, known as parallel dynamic interaction (PDI), as a general solution framework that is applicable to a number of computationally intractable problems, and gives details of its general methodology. From a parallel processing standpoint, PDI is interesting because it is inherently based upon the dynamic interplay between simultaneously executing subproblems. As such, PDI has no direct serial analog, and is not directly amenable to conventional parallel processing speedup analysis. This may provide an indication that parallel processing can offer opportunities beyond simply speeding up the solution of sequentially specified algorithms. From a practical problem-solving perspective, PDI shows promise as a method capable of generating high quality solutions to exponentially and super-exponentially hard problems. For large problems, PDI is often able to find a near-optimal solution many orders of magnitude faster than the time taken for a conventional parallel branch-and-bound search to find a solution of comparable quality.> Ira Pramanick, Jon G. Kuhl |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 1995 | An Inherently Parallel Method for Heuristic Problem-Solving: Part II-Example ApplicationsabstractFor pt.I. see ibid., p.1006-15. This paper presents the application of parallel dynamic interaction (PDI) to three real problem domains: the flowshop scheduling problem, the job-shop scheduling problem and the vertex cover problem. Specific examples are provided as to how the general PDI framework, introduced in part I of this paper, can be applied to a particular problem. The results of an empirical study of 90 example instances of these problems indicate that PDI consistently out-performs previously published heuristics for the vertex cover problem, and can typically generate solutions within a few percent of optimal for flow-shop and job-shop problems. Out of the 76 examples for which the optimal solution could be determined, PDI was able to produce results averaging within 4% of optimal. In over 30% of the cases, PDI was able to find the optimal solution. In no case did the PDI solution deviate more than 15% from optimal. It is also seen that the time taken by PDI to arrive at these solutions is negligible compared to that taken by conventional search techniques. This provides strong empirical evidence that PDI is capable of generating high quality solutions to exponentially and super-exponentially hard problems in reasonably short periods of time.> Ira Pramanick, Jon G. Kuhl |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 1994 | Distributed Solutions to the Delay Fault Test Quality Evaluation ProblemabstractDelay testing continues to gain importance as manufacturers try to meet stricter requirements for higher performance and higher density integrated circuits. The methodology to obtain a set of high quality gate delay fault detecting tests is unfortunately computationally intensive enough to be intractable for reasonably large VLSI circuits; parallelization of these computations is thus an attractive scenario. We present, for the first time, distributed algorithms for gate delay fault simulation and fault coverage determination through test quality evaluation. These algorithms are implemented over a network of workstations, which is normally available at most design labs, and thus do not rely os the use of very specialized, expensive, or difficult-to-access hardware. These algorithms are theoretically analyzed, and experimental studies of their implementation are reported. The results conform to the theoretically predicted performance, with speedups of up to 10 being obtained with 15 workstations.> Ira Pramanick, Ankan K. Pramanick |
HPDC | 1 |
| 1994 | Analysis and Experiments for a Parallel Solution to the All Pairs Shortest Path ProblemabstractThis paper proposes and analyzes a parallel implementation of the matrix product algorithm for the all pairs shortest path problem for a distributed memory MIMD model. The results of experiments conducted on a 128-processor hypercube machine show that the parallel implementation achieves the performance predicted by the analysis.> Ira Pramanick, Hyder Ali |
ISCAS | 1 |
| 1993 | Distributed Computing Solutions to the All-Pairs Shortest Path ProblemabstractThis paper proposes two distributed solutions to the all-pairs shortest path problem, and reports the results of experiments conducted on a network of IBM RISC System/6000s, containing up to seven such workstations. It discusses the issues that become critical in a distributed environment as opposed to a parallel environment, and the results obtained underline the importance of reducing communication between the loosely coupled subtasks in a distributed environment. The results demonstrate that properly designed distributed algorithms, which take into account the limitations (in terms of a slower communication medium and/or the non-dedicated mode of machines) of a distributed computing environment, can yield significant performance benefits.> Ira Pramanick |
HPDC | 1 |
| 1992 | Application of a Parallel Heuristic Framework to the Set Covering Problem
Ira Pramanick |
ICPP (3) | 1 |
| 1991 | Study of an Inherently Parallel Heuristic Technique
Ira Pramanick, Jon G. Kuhl |
ICPP (3) | 1 |