According to the SIA roadmap, DRAM, which for the purpose of this paper includes SDRAM, RDRAM, and SLDRAM, will be a technology driver in the semiconductor industry for the next fourteen years. Data and bus rates are increasing, as well as device densities and storage capacity. These performance specifications, coupled with diminishing market prices, are instigating new test philosophies and ATE requirements for wafer sort. Although the performance specifications aren't quite so rigid, flash memory is also experiencing much of the same change. These devices and their corresponding wafer sort requirements will be a dominant stimulus for the evolution of probe card/interface tool sets over the next one to two years. They drive new design philosophies along with usage and maintenance issues.