A snake-in-the-box (SIB) code of order k is defined to be an ordered sequence of binary code words in which adjacent words differ in only one bit, and pairs of code words that are k or more apart in the ordered sequence differ in at least k bit positions. In this paper, constructions for SIB codes of arbitrary order are given, as well as upper bounds on the maximum code sequence length for given order and word size. These codes are potentially useful for binary encoding of analog data. Gray codes are SIB codes of order one, and Kautz has investigated SIB codes of order two. The SIB codes of a given order contain as a subset all SIB codes of higher order.

A binary superimposed code consists of a set of code words whose digit-by-digit Boolean sums(1 + 1 = 1)enjoy a prescribed level of distinguishability. These codes find their main application in the representation of document attributes within an information retrieval system, but might also be used as a basis for channel assignments to relieve congestion in crowded communications bands. In this paper some basic properties of nonrandom codes of this family are presented, and formulas and bounds relating the principal code parameters are derived. Finally, there are described several such code families based upon (1)q-nary conventional error-correcting codes, (2) combinatorial arrangements, such as block designs and Latin squares, (3) a graphical construction, and (4) the parity-check matrices of standard binary error-correcting codes.

Aq-nary error-correcting code withN = q^{k}code words of lengthn = k + rcan have no greater minimum distancedthanr+1. The class of codes for whichd = r+1is studied first in general, then with the restriction that the codes be linear. Examples and construction methods are given to show that these codes exist for a number of values ofq, k, andr.

Designs for load-sharing zero-noise core switches have been proposed by Constantine, Marcus, and Chien. Blachman class has proposed a core memory wiring plan which with modification can be converted to a load-sharing zero-noise switch. An examination of these switch plans shows that they have a common relationship to a class of mathematical structures known to mathematicians and statisticians as balanced incomplete block designs. This relationship is formulated, and it is then shown that all balanced incomplete block designs lead to load-sharing zero-noise switches. Three methods of forming the winding matrix for a switch are given, and expressions for the load-sharing factor, set bias, and reset bias in terms of the balanced incomplete block design parameters are derived for each switch type. Similarly, partially balanced incomplete block designs are shown to lead to low-noise load-sharing switches. Switch operation under fault conditions is briefly discussed. Most of the known load-sharing core switch types can be viewed as based on either balanced or partially balanced incomplete block designs. A review of the available block designs indicates that a number of new switches can be based on these designs. A modification of a distributed memory model proposed by C. Rosen is discussed. With wiring plans based on block designs, it appears possible to construct very-large-capacity memory units which are relatively insensitive to wiring errors.

article Free Access Share on Sorting by Address Calculation Authors: E. J. Isaac Stanford Research Institute, Menlo Park, California Stanford Research Institute, Menlo Park, CaliforniaView Profile , R. C. Singleton Stanford Research Institute, Menlo Park, California Stanford Research Institute, Menlo Park, CaliforniaView Profile Authors Info & Claims Journal of the ACMVolume 3Issue 3pp 169–174https://doi.org/10.1145/320831.320834Published:01 July 1956Publication History 41citation1,179DownloadsMetricsTotal Citations41Total Downloads1,179Last 12 Months144Last 6 weeks22 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF