Demo Data from EDBT 2026 / reviewers in the wild / expert
Jürgen Bortolazzi
dblp:63/6698
· DBLP profile ↗
2ranked-venue papers
1as first author
0since 2021 · last 2005
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 91% Integrated circuit design · 9% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test › hardware verification
consistency checking |
0.0 | 1 | 1989 | An Approach to Intelligent Assistance for the Specification of ASIC Design Using Objects and Rules · DAC 1989 |
Electronic design automation › hardware verification and test
hardware verification |
0.0 | 1 | 1989 | An Approach to Intelligent Assistance for the Specification of ASIC Design Using Objects and Rules · DAC 1989 |
Integrated circuit design
ASIC design |
0.0 | 1 | 1989 | An Approach to Intelligent Assistance for the Specification of ASIC Design Using Objects and Rules · DAC 1989 |
Methods — techniques the papers use, named apart from their topics
rule-based checking · 0.0object-oriented representation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2005 | Automotive System Architectures (Automotive Special Day)
Jürgen Bortolazzi, J.-L. Maté, C. Morgano |
DATE | 1 |
| 1989 | An Approach to Intelligent Assistance for the Specification of ASIC Design Using Objects and RulesabstractThe demand for true “system integration” leads to an increasing number of Application Specific Integrated Circuit (ASIC) designs having non-standard electrical and timing input/output characteristics and operating environments. This mandates a computer assistance during the specification phase as well as the management of intermediate and final design results. Furthermore, early and simulation independent consistency checking is necessary to prevent expensive redesigns. This paper presents a new knowledge based approach to the acquisition, checking and processing of electrical, timing, environmental and test oriented specification data using object-oriented data representation and rule-based consistency checking. This approach is part of the DEBYS (DEsign BY Specification) project under development at the University of Erlangen-Nuernberg. This system is currently working for digital ASIC and will be enhanced for system design. Klaus D. Müller-Glaser, Jürgen Bortolazzi |
DAC | 2 |