Demo Data from EDBT 2026 / reviewers in the wild / expert
Andy S. F. Fung
dblp:63/70
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1981
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
hardware verification and test |
0.0 | 1 | 1981 | Multiple Fault Testing of Large Circuits by Single Fault Test Sets · IEEE Trans. Computers 1981 |
Electronic design automation › hardware verification and test › fault coverage
multiple fault coverage |
0.0 | 1 | 1981 | Multiple Fault Testing of Large Circuits by Single Fault Test Sets · IEEE Trans. Computers 1981 |
Electronic design automation › hardware verification and test › test generation
single fault test sets |
0.0 | 1 | 1981 | Multiple Fault Testing of Large Circuits by Single Fault Test Sets · IEEE Trans. Computers 1981 |
Electronic design automation › hardware verification and test
combinational circuit testing |
0.0 | 1 | 1981 | Multiple Fault Testing of Large Circuits by Single Fault Test Sets · IEEE Trans. Computers 1981 |
Methods — techniques the papers use, named apart from their topics
table lookup · 0.0fault coverage analysis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1981 | Multiple Fault Testing of Large Circuits by Single Fault Test SetsabstractA general theory is presented in this paper to quantitatively predict the multiple fault coverage capability of single fault detection test sets in combinational circuits. The theory is unique in that it provides greatest lower bounds on the coverage capability of all possible circuits of concern by a simple table-look-up process. All the results known so far in this area are seen to be special cases of the theory. The more important contribution of the theory, however, is seen in its predictions made for reconvergent internal fan-out circuits. Most unexpectedly, the multiple fault coverage of such circuits by single fault test sets is discovered to be extremely precarious. Such results clearly have alarming implications in LSI and VLSI testing. Vinod K. Agarwal, Andy S. F. Fung |
IEEE Trans. Computers | 2 |