Techniques for the foreground calibration of split capacitor successive approximation register (SAR) are discussed. The used methods of digital calibration requires a digital post-processing that can be a limit for the resulting overhead. The presented techniques allow directly obtaining the digital output. Two methods address the mismatch among the unit elements in the most significant byte (MSB) segment and the mismatch at the MSB-LSB interface. A 16-bit SAR ADC with a sampling rate of 1MS/s employs both calibration techniques and verifies the methods. The simulation results show a Schreier merit of 166.3 dB, a signal-to-noise-and-distortion ratio (SNDR) of 87 dB, and an SFDR of -100 dB. A chip fabricated in a 180-nm Bipolar-CMOS-DMOS (BCD) process almost obtains the expected SNDR. The experimental result shows that the spurious-free dynamic range (SFDR) improves from 70.71 to 93.29 dB.

This work presents the design of a bipolar junction transistor (BJT)-based temperature sensor with a sigma-delta analog-to-digital converter ($\Sigma \Delta $ADC) fabricated in a 0.6$\mu $m BiCMOS process. The sensor utilizes a proportional to absolute temperature (PTAT) current source embedding an auto-zeroing amplifier to bias the BJT core while effectively reducing offset errors. Additionally, this work achieves the combination of the temperature-sensing BJT core and the$\Sigma \Delta $modulator, utilizing dynamic element matching (DEM) technique to accurately generate three different ratios (1:9, 9:1, 5:5) of BJT bias currents to cooperate with the modulator for modulation. The innovative modulation method in this work can reduce the errors caused by the operational amplifier offset voltage and BJT mismatch, completing the digitization of temperature without the need for a reference voltage source. Moreover, the sensor integrates a complete digital signal processor (DSP), allowing on-chip calibration by adjusting the operating cycle of the modulator and the initial value of the counter to obtain accurate and directly readable temperature data. It operates under a 3.3 V supply within a temperature range from −50 °C to 125 °C. Lastly, it achieves a 17 mK resolution and an inaccuracy of ±1.5 °C (3$\sigma $) after an on-chip single-point calibration.

The goal of new engineering is to cultivate innovative talents who can adapt to the requirements of new era and new technology. Under the background of new engineering, the construction of “Double First-Class” initiative puts forward higher requirements for the basic theory of integrated circuit teaching and research. This paper explores reform methods in the teaching content, teaching mode and practical teaching of integrated circuit related courses in accordance with the talent training mode of innovative application-oriented undergraduate education. The purpose of this education reform is to cultivate the students' ability to think independently and solve practical problems. At the same time, it can promote the communication between electronic specialty and other majors, and cultivate students' comprehensive quality and innovation ability.

The purpose of educational innovation is to train talents meeting the needs of modern science and technology development and to promote the sound and fast development of society. In this paper, the present situation and existing problems of engineering education personnel training are discussed, and the teaching method of integrating theory and practice is put forward. At the same time, students are encouraged to participate in the base practice opportunities provided by enterprises to promote the development of students' theoretical knowledge and practical skills in all aspects.

This paper proposes a practical teaching program of data acquisition and processing technology course based on the concept of Outcome based education (OBE). It takes students as the main body and adopts reverse thinking to reform and construct the current curriculum system. Meanwhile, the analysis and summary of the teaching effects presented after the improvement demonstrate that the program is effective in improving teaching quality, developing students' engineering thinking logic, and enhancing students' ability to solve practical engineering problems. Students have shown great performance in many professional competitions, and their final grades have also steadily increased year by year.

In recent years, the educational innovation of electronic information courses has attracted widespread attention. This article combines the emergence of new educational concepts and teaching methods to propose a four-in-one educational method of “theory-simulation-experiment-innovation”. Practical teaching proves that the four-in-one teaching method helps to improve the teaching quality of electronic circuits.

Lethality of Neurological diseases (NDs) are increasing every year and tend to mainly affect people under the age of 50. High rates of premature death and disability caused by NDs undoubtedly constrain societal development. However, seldom research about NDs Education program in universities has been developed. Therefore, this work is to review the educational programmes about implantable and wearable electronic devices for neurological disease applications in universities.

In the teaching of electronic engineering, some practical projects need to be added in order to connect various courses together. To strengthen the connections between courses, the project-based teaching method proposed in this paper advocates linking the knowledge of different courses through the combination of theory and practice. With this as a guide, projects have been set up for students. One of them is about designing and making a managed ethernet switch. In the process of making and completing this project, the students' ability has been significantly improved, which fully proves the benefits of the teaching method.

This article puts forward some feasible sensor related courses redesign for solving the current predicament of electronic information course education. Two practical teaching cases have been given in this work. The approach proposed in this work allows students to flexibly use what they have learned, then put theories into practice.

This paper presents a novel method to calibrate the mismatch in the process of analyzing the acquired information by remote sensing technology. Moreover, the essence of reducing mismatch is the correction of analog-to-digital converters (ADCs). The proposed 12-bit successive approximation register (SAR) ADC uses the Vcm-Based structure to reduce the significant power from the most significant bit (MSB), and calibrates the mismatch in the capacitive array through sorting capacitors. The proposed ADC is implemented in the 180nm complementary metal-oxide-semiconductor (CMOS) technology and improves the spurious-free dynamic range (SFDR) from 62.59dB to 78.16dB and the signal-to-noise-distortion ratio (SNDR) from 58.356dB to 70.04dB.

This paper presents a digital magnetic field detection system, which can collect and analyze the remote sensing data by using the analog-to-digital converters (ADCs). The proposed digital magnetic field detection system contains two different types of digital pulse-width modulation (PWM) ADCs by using the complementary metal-oxide-semiconductor (C-MOS) mixed-signal technology and the field-programmable gate array platform (FPGA). The 12-bit digital PWM delta-sigma (ΔΣ) ADC is implemented in 180nm CMOS mixed-signal technology and achieves the signal-to-noise-distortion ratio (SNDR), the spurious free dynamic range (SFDR) and the effective number of bits (ENOB) are 70.68dB, 92.62dB and 11.44-bit with a supply voltage of 1.2V and at a sampling rate of 58.82kS/s. The digital PWM successive approximation register (SAR) ADC is based on FPGA to reduce the interference in the workpiece magnetic field to enhance reliability. Proposed digital PWM ADCs can be combined with a Hall effect sensor to measure the magnitude of a magnetic field without using the microcontroller, which are widely used for proximity sensing, positioning, speed detection, and current sensing applications.

In order to adapt to the need of high sensitivity, high accuracy, high data transmission speed and low power consumption in Hall-effect sensor application field, a sensor microsystem including a high-precision Hall voltage sensor, a 24-bit analog-to-digital converter, a FPGA chip and a LCD1602 is designed in order to detect and display the external magnetic field strength in real time. In this paper, we discussed the hardware and software design of Hall-effect microsystem sensors in details. Finally, system debugging and performance analysis have been given.

Nowadays, the field of microelectronics has become the drive for the advancement of the times, which promotes new demands on the cultivation of the students in colleges and universities. In order to keep up with the trend of the global engineering educational reform, three important reforms in education have been in progress step by step, including classroom teaching, innovative training and virtual laboratories. At first, for enhancing and integrating the existing courses related to the circuit, so that the students can comprehend the existing knowledge much more effectively, an important and effective curriculum reform has been performed by combining “Circuit Analysis” and “Analog Circuit Foundation” into one course; Then, innovative training has been carried out to cultivate the team skills among the students; Finally, in consideration of the rapid development of the electrical and electronic experiment, the conventional laboratory equipment may not satisfy the demand of every student due to financial constraints, therefore, the construction of virtual simulation experiment center is an efficient way to break this bottleneck. As a result, the atmosphere of academic innovation of the pursuit of truth, advocacy of science, brave exploration, dare to practice have been formed in colleges and universities through the above innovative engineering education reform.

Cardiovascular disease is the leading cause of global mortality, with 17.5 Million deaths per annum (World Health Authority, WHO). Innovative hardware based cardiac recording devices could help elevate this burden. Delay-based reservoir computing is a novel computational framework with only a single nonlinear node. This feature makes it a strong candidate for the hardware implementation of an analogue cognitive system. Such a system can be exploited to improve the energy efficiency of data processing in implantable bioelectronic devices. This paper presents a system modelling of this network that is capable of cognitively processing Electrocardiograph (ECG) signals from the MIT-BIH arrhythmia database. The proposed single-input single-output model receives an encoded ECG signal while the output amplitude pattern aids the diagnostic interpretation. The information processor is an analogue circuit with the dynamic properties of Mackey-Glass nonlinearity and fading memory. To validate this system and mimic real-time operation, the simulation is designed to detect ventricular ectopic beats, an ectopic heartbeat type, using a continuous ECG signal without any signal segmentation or feature extraction. After training, the model successfully locates ventricular ectopic beat with 87.51% sensitivity and 94.12% accuracy for the testing dataset from three patients.

In this work, a high precision adaptive slope compensation circuit is proposed used in DC-DC converter for System-on-Chip Power Management. Compared with the conventional adaptive slope compensation circuit, this work uses the comparator to sample the output voltage and the input voltage, so that the accuracy has been greatly improved. In this paper, the circuit is designed based on UMC 0.18-μm CMOS Technology and verified by Cadence simulation environment. Simulation results show that, the compensation precision of the slope can reach more than 96% when changes the input voltage with output voltage fixed or changes the output voltage while keeping input voltage constant.

Principle and Application of Microcontroller Unit” is the core course in Circuits and Systems. Microcontroller Unit is widely used in industrial production. Students with basic design ability of MCU system will have good prospects. The teaching of MCU is mainly based on two simulation softwares, Proteus and Keil. They are very helpful in teaching MCU, but the shortcomings are obvious. The simulation can only test the functionality of the circuit and the correctness of the program, and cannot verify the reliability and practicability of the designed system. This paper proposes an experiment-based MCU teaching method, which combines theory with practice to improve students' practical ability and comprehensive ability.

This paper presents a CMOS readout circuit for an integrated and highly-sensitive tunnel-magnetoresistive (TMR) sensor. Based on the characterization of the TMR sensor in the finite-element simulation, using COMSOL Multiphysics, the circuit including a Wheatstone bridge and an analogue front-end (AFE) circuit, were designed to achieve low-noise and low-power sensing. We present a transimpedance amplifier (TIA) that biases and amplifies a TMR sensor array using switched-capacitors external noise filtering and allows the integration of TMR sensors on CMOS without decreasing the measurement resolution. Designed using TSMC 0.18 μm 1V technology, the amplifier consumes 160 nA at 1.8 V supply to achieve a dc gain of 118 dB and a bandwidth of 3.8 MHz. The results confirm that the full system is able to detect the magnetic field in the pico-Tesla range with low circuit noise (2.297 pA/√Hz) and low power consumption (86 μW). A concurrent reduction in the power consumption and attenuation of noise in TMR sensors makes them suitable for long-term deployment in spintronic sensing systems.

Process Variation (PV) may cause accuracy loss of the analog neural network (ANN) processors, and make it hard to be scaled down, as well as feasibility degrading. This paper first analyses the impact of PV on the performance of ANN chips. Then proposes an in-situ transfer learning method at system level to reduce PV's influence with low-precision back-propagation. Simulation results show the proposed method could increase 50% tolerance of operating point drift and 70% ∼ 100% tolerance of mismatch with less than 1% accuracy loss of benchmarks. It also reduces 66.7% memories and has about 50× energy-efficiency improvement of multiplication in the learning stage, compared with the conventional full-precision (32bit float) training system.

The combination of engineering education and research is an effective method to construct high performance college teachers, which is a cradle to cultivate young teachers. Teaching and research group of "circuit analysis and electronic circuits" in our university promotes experimental engineering education by scientific research through long-term practice and summary in terms of training students, several detailed individual innovative experiments derived from scientific research of teachers are given, a virtuous cycle between engineering education and scientific research can stimulate interest and the motivation of students. Furthermore, engineering education and experimentat teaching promoted by scientific research can get rid of the restraint of the conventional mechanical passive teaching scheme and can refax the dilemma of teaching and learning, finally, the interest and ¡earning motivation of students can effectively be stimulated.

This paper presents a capacitive array optimization technique capable to improve the Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio (SNDR) of Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for smart sensor specifications. Monte Carlo simulation results show that the proposed optimization technique makes the SFDR, SNDR and (Signal-to-Noise Ratio) SNR better definitely concentrated, which means with a spread between maximum and minimum value much smaller than the one obtained by conventional calibration techniques. This gives rise to more stable and better performances. The averaged SFDR improves from 72.9 dB to 91.1 dB with σu = 0.4%, the 18.2 dB improvement required an off-line processing and a small digital logic circuits.

Motivated by the demands of the integrated power system in the modern wearable electronics, this paper presents a new method of inductor-less switched-capacitor (SC) based DC-DC converter designed to produce two simultaneous boost and buck outputs by using a 4-phases logic switch mode regulation. While the existing SC converters missing their reconfigurability during needed spontaneous multi-outputs at the load ends, this work overcomes this limitation by being able to reconfigure higher gain mode at dual outputs. From an input voltage of 2.5 V, the proposed converter achieves step-up and step-down voltage conversions of 3.74 V and 1.233 V for Normal mode, and 4.872 V and 2.48 V for High mode, with the ripple variation of 20-60 mV. The proposed converter has been designed in a standard 0.35 μm CMOS technology and with conversion efficiencies up to 97-98% is in agreement with state-of-the-art SC converter designs. It produces the maximum load currents of 0.21 mA and 0.37 mA for Normal and High modes respectively. Due to the flexible gain accessibility and fast response time with only two clock cycles required for steady state outputs, this converter can be applicable for multi-function wearable devices, comprised of various integrated electronic modules.

This paper presents linearity enhancement capacitor re-configuring technique to improve the Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio (SNDR) of ADC simultaneously without sacrificing the sampling rate in a 14-bit successive approximation register (SAR) analog-to-digital converter (ADC) for wearable electronics application. Behavioural Monte-Carlo simulations are presented to demonstrate the effect of the proposed method where no complex least-mean-square (LMS) algorithm. Simulation results show that with a mismatch error typical of modern technology, the SFDR is enhanced by about 18 dB and the SNDR is 15 dB better with the proposed technique for a 14-bit SAR ADC, which makes it suitable for accurate and linear smart sensor nodes in wearable sensing systems.