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Roy D. Merrill Jr.

dblp:64/10984 · DBLP profile ↗
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4ranked-venue papers
4as first author
0since 2021 · last 1967
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 4 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
4 papers
Integrated circuit design · 50% Electronic design automation · 45% Processor architecture and microarchitecture · 5%

Topics — the 9 heaviest of 9, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
logic synthesis		 0.031967
Symmetric Ternary Switching Functions: Their Detection and Realization with Threshold Logic · IEEE Trans. Electron. Comput. 1967
A Tabular Minimization Procedure for Ternary Switching Functions · IEEE Trans. Electron. Comput. 1966
Some Properties of Ternary Threshold Logic · IEEE Trans. Electron. Comput. 1964
Integrated circuit design › digital circuit design
threshold logic		 0.031967
Symmetric Ternary Switching Functions: Their Detection and Realization with Threshold Logic · IEEE Trans. Electron. Comput. 1967
Some Properties of Ternary Threshold Logic · IEEE Trans. Electron. Comput. 1964
A Tabular Minimization Procedure for Ternary Switching Functions · IEEE Trans. Electron. Comput. 1966
Integrated circuit design
digital circuit design		 0.031967
Ternary logic in digital computers · DAC 1965
Symmetric Ternary Switching Functions: Their Detection and Realization with Threshold Logic · IEEE Trans. Electron. Comput. 1967
Some Properties of Ternary Threshold Logic · IEEE Trans. Electron. Comput. 1964
Electronic design automation › logic synthesis
logic minimization		 0.011966
A Tabular Minimization Procedure for Ternary Switching Functions · IEEE Trans. Electron. Comput. 1966
Integrated circuit design › digital circuit design › multivalued logic circuit
ternary logic		 0.011965
Ternary logic in digital computers · DAC 1965
Electronic design automation › logic synthesis › multiple-valued logic synthesis
ternary threshold function		 0.011964
Some Properties of Ternary Threshold Logic · IEEE Trans. Electron. Comput. 1964
Processor architecture and microarchitecture › instruction set architecture
instruction set design		 0.011965
Ternary logic in digital computers · DAC 1965
Integrated circuit design › digital circuit design
multivalued logic circuit		 0.021967
Symmetric Ternary Switching Functions: Their Detection and Realization with Threshold Logic · IEEE Trans. Electron. Comput. 1967
Some Properties of Ternary Threshold Logic · IEEE Trans. Electron. Comput. 1964
Processor architecture and microarchitecture › computer arithmetic
number representation		 0.011965
Ternary logic in digital computers · DAC 1965

Methods — techniques the papers use, named apart from their topics

threshold function synthesis · 0.0threshold device minimization · 0.0ternary logic · 0.0tabular minimization · 0.0mccluskey method · 0.0counting theorem · 0.0
YearPublicationVenuePosition
1967 Symmetric Ternary Switching Functions: Their Detection and Realization with Threshold Logic
abstract
A simple, systematic procedure for detecting symmetric ternary switching functions is developed. The detection procedure is essentially based on a derived counting theorem. Other important properties and close bounds on the number of ternary symmetric functions are developed. A design method is given whereby symmetric functions can be readily synthesized with switching networks which are economical, and, in certain instances, minimal in the number of ternary threshold devices required. The greatest lower bound on the number of devices required for a given symmetric function is developed.
Roy D. Merrill Jr.
 IEEE Trans. Electron. Comput.1
1966 A Tabular Minimization Procedure for Ternary Switching Functions
abstract
A tabular minimization procedure for ternary switching functions is developed. The theory is analogous to that used in the McCluskey simplification method for Boolean functions. Using the ternary function truth table, the procedure provides a systematic method of applying a limited set of reduction rules in a converging process for obtaining a minimal irredundant form of the function. It is shown how the procedure can be used to derive simplified expressions for arbitrary ternary functions in terms of a particularly attractive system of threshold gating functions. The procedure has more general applications in providing a simple method of finding, for any given function, all binary variables of the function and all variables of which the function is independent.
Roy D. Merrill Jr.
 IEEE Trans. Electron. Comput.1
1965 Ternary logic in digital computers
abstract
Although the states as well as the number representation of virtually every digital computer are implemented for the most part with binary logic, there are other systems such as the ternary or quinary that could just as well be used. The choice of which logic system to use should be determined primarily on the basis of cost, reliability, and operating speeds of the physical realization. This paper will be concerned with the potential of ternary logic, advantages of this logic, and whether in the future it could be expected to be utilized in digital systems.
Roy D. Merrill Jr.
 DAC1
1964 Some Properties of Ternary Threshold Logic
abstract
A class of 3-valued switching functions, called ternary threshold functions, has been defined and described in some detail by Hanson [1]. It has been suggested' that continued investigation of synthesis with functions of this class is desirable; this note elaborates further on the properties of ternary threshold functions and demonstrates some to their use in network synthesis.2
Roy D. Merrill Jr.
 IEEE Trans. Electron. Comput.1