The increasing number of Internet users has caused a dramatic increase in electronic commerce. This growth is outpacing technologies for dependability, causing traditional views of high availability to come under question. In particular, Internet failures are a phenomenon external to the owner of a commerce site that must be dealt with, and therefore, geographically distributed servers are a basic availability requirement for e-commerce sites. Geographic distribution provides an opportunity to view users in different roles based on those distributed components they must access. This paper presents an approach based on partitioning online function into domains, each of which provides service to users in a specific role. Coordination between domains is eliminated as much as possible by exploiting application-specific knowledge. Once partitioned, availability techniques may be applied to each domain independently. We argue such an approach is necessary to deal with the geographic distribution of system components imposed by the nature of the Internet and maps well onto real e-commerce deployments.

Fault observability based on the behavior of memory references is studied. Traditional studies view memory as one monolithic entity that must completely work to be considered reliable. The usage patterns of a particular program's memory are emphasized here. This paper develops a new model for the successful execution of a program taking into account the usage of the data by extending a cache memory performance model. Three variations, based on well known allocation schemes, are presented (i.e., whether the program's storage is preallocated, dynamically allocated, or constrained in allocation). This is contrasted to traditional memory reliability calculations to show that the actual mean time to failure may be more optimistic when program behavior is considered. It also develops expressions for the probability of unobserved faults. With several studies reporting correlations between increased workloads and increased failure rates, a new theory is proposed here that provides an explanation for this behavior. The model studies several program traces demonstrating that increased workloads could cause an increase of the observed failure rates in the range of 32% to 53%.

This paper proposes a cost effective fault tolerant memory structure. It uses the modified status of virtual memory pages as the basis to propose a system with two classes of memory. One class is for modified pages, and the other is for pages not modified. The term hybrid memory system is used to describe this system. Results show the cost savings for a hybrid system over a traditional fault tolerant system. Hybrid virtual memory algorithms are proposed for the system. The traditional lifetime and space-time measures of virtual memory algorithms are extended for the hybrid algorithms. This includes "cost-weighted" measures to reflect the fact that the two classes of memory may have different resource allocation constraints. A theoretical result is presented for the effect of combining the hybrid lifetime functions. Finally, a framework for developing hybrid algorithms is presented with experimental results illustrating the analysis. It is shown that the lifetime measure for the hybrid policies can show improvements over traditional algorithms.>

The authors propose and evaluate an efficient hierarchical clustering and allocation algorithm that drastically reduces the interprocess communications cost while observing lower and upper bounds of utilization for the individual processors. They compare the algorithm with branch-and-bound-type algorithms that can produce allocations with minimal communication cost, and show a very encouraging time complexity/suboptimality tradeoff in favor of the algorithm, at least for a class of process clusters and their random combinations which it is believed occur naturally in distributed applications. The heuristic allocation is well suited for a changing environment, where processors may fail or be added to the system and where the workload patterns may change unpredictably and/or periodically.>

Checkpoint and rollback recovery is a technique that allows a system to tolerate a failure by periodically saving the entire state and, if an error is detected, rolling back to the prior checkpoint. A technique that embeds the support for checkpoint and rollback recovery directly into the virtual memory translation hardware is presented. The scheme is general enough to be implemented on various scopes of data such as a portion of an address space, a single address space, or multiple address spaces. The technique can provide a high-performance scheme for implementing checkpoint and rollback recovery. The performance. of the scheme is analyzed using a trace-driven simulation. The overhead is a function of the interval between checkpoints and becomes very small for intervals greater than 10/sup 6/ references. However, the scheme is shown to be feasible for intervals as small as 1000 references under certain conditions.>

Checkpointand Tollback Tecovery is a technique that allows a system to io~eTate a faihwe by pe?'iodically saving the eniipe siaie and if an emoT OCCUTS, Toliing back to the prioT checkpoint.This technique zs paTticulady suited to applications with long execution times such as those typically found m supercomputer environments.This paper presents a technique that embeds the support for checkpoint and Tollback recovery dmect~y into the virtual memory translation hardware.The scheme is general enough to be implemented on various scopes oj data such as a portion of an address spacej a single address space OT multiple address spaces.A basic model is developed which measures the amount of work required by the scheme as a function of the checkpoint internal szze.Using this model the degree to which the overhead decTeases as the interval size increases is shown. 1 As mentioned, both copies need not always exist but at least must be retreatable.For example, to tolerate to program failure one could save only the active set, plus a record of *Work performed while on leave at the University of Mas.sachuset ts on Ph.D. studies.