Demo Data from EDBT 2026 / reviewers in the wild / expert
Sung-Kwan Kim
dblp:64/3272
· DBLP profile ↗
6ranked-venue papers
3as first author
0since 2021 · last 2020
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 4 · 1 first-authorDatabases, data management, data science and information retrieval · 2 · 2 first-authorHuman-computer interaction and ubiquitous computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Embedded and real-time systems · 42% Electronic design automation · 31% Processor architecture and microarchitecture · 15% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Embedded and real-time systems
worst-case execution time analysis |
0.0 | 2 | 1999 | Analysis of the Impacts of Overestimation Sources on the Accuracy of Worst Case Timing Analysis · RTSS 1999 Worst Case Timing Analysis of RISC Processors: R3000/R3010 Case Study · RTSS 1995 |
Electronic design automation › timing analysis
real-time timing analysis |
0.0 | 1 | 1999 | Analysis of the Impacts of Overestimation Sources on the Accuracy of Worst Case Timing Analysis · RTSS 1999 |
Processor architecture and microarchitecture
pipelining |
0.0 | 1 | 1995 | Worst Case Timing Analysis of RISC Processors: R3000/R3010 Case Study · RTSS 1995 |
Performance modeling and evaluation › simulation
simulation-based analysis |
0.0 | 1 | 1999 | Analysis of the Impacts of Overestimation Sources on the Accuracy of Worst Case Timing Analysis · RTSS 1999 |
Memory systems
cache |
0.0 | 1 | 1995 | Worst Case Timing Analysis of RISC Processors: R3000/R3010 Case Study · RTSS 1995 |
Electronic design automation › timing analysis
cache timing analysis |
0.0 | 1 | 1995 | Worst Case Timing Analysis of RISC Processors: R3000/R3010 Case Study · RTSS 1995 |
Methods — techniques the papers use, named apart from their topics
simulation · 0.0variance analysis · 0.0timing schema · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | CYPminer: an automated cytochrome P450 identification, classification, and data analysis tool for genome data sets across kingdomsabstractBACKGROUND: Cytochrome P450 monooxygenases (termed CYPs or P450s) are hemoproteins ubiquitously found across all kingdoms, playing a central role in intracellular metabolism, especially in metabolism of drugs and xenobiotics. The explosive growth of genome sequencing brings a new set of challenges and issues for researchers, such as a systematic investigation of CYPs across all kingdoms in terms of identification, classification, and pan-CYPome analyses. Such investigation requires an automated tool that can handle an enormous amount of sequencing data in a timely manner. RESULTS: CYPminer was developed in the Python language to facilitate rapid, comprehensive analysis of CYPs from genomes of all kingdoms. CYPminer consists of two procedures i) to generate the Genome-CYP Matrix (GCM) that lists all occurrences of CYPs across the genomes, and ii) to perform analyses and visualization of the GCM, including pan-CYPomes (pan- and core-CYPome), CYP co-occurrence networks, CYP clouds, and genome clustering data. The performance of CYPminer was evaluated with three datasets from fungal and bacterial genome sequences. CONCLUSIONS: CYPminer completes CYP analyses for large-scale genomes from all kingdoms, which allows systematic genome annotation and comparative insights for CYPs. CYPminer also can be extended and adapted easily for broader usage. Ohgew Kweon, Seong-Jae Kim, Jae Hyun Kim, Seong Won Nho, Dongryeoul Bae, Jungwhan Chon, Mark Hart, Dong-Heon Baek, Young-Chang Kim, Sung-Kwan Kim, John B. Sutherland, Carl Cerniglia |
BMC Bioinform. | 11 |
| 2011 | An Ontological Approach to Enterprise Knowledge Modeling in a Shipping CompanyabstractModeling approaches are gaining popularity in knowledge management (KM), especially in specifying knowledge contents. This paper addresses the enterprise knowledge modeling. An enterprise knowledge model provides users with an integrated, holistic view of organizational knowledge resources. Employing a reliable methodology is critical to building successful enterprise knowledge models. A good methodology provides an effective and efficient mechanism for developing a model. This paper first reviews the enterprise knowledge modeling (EKM) and its methodologies. An ontology-based EKM (OBEKM) methodology is proposed. Its products, procedures, and modeling language are described. The methodology is then applied to the construction of a shipping company’s knowledge model for demonstration. Sung-Kwan Kim, Joe Felan, Moo Hong Kang |
Int. J. Knowl. Manag. | 1 |
| 2007 | Flash memory-based storage device for mobile embedded applicationsabstractThis paper reviews Flash memory technology and flash translation layer (FTL) that provides a block device interface out of flash memory. It also describes two implementations of FTL that represent two extreme points in the spectrum of cost-performance trade-offs in FTL implementation. After presenting results on the performance and energy- efficiency of the two FTLs, this paper argues for a configurable FTL to address the diversity of mobile embedded systems in terms of cost and performance requirements. Jin-Yong Choi, Kiseok Choi 0001, Sung-Kwan Kim, Sookwan Lee, Eyee Hyun Nam, JiHyuck Yun, Sang Lyul Min, Yookun Cho |
SMC | 3 |
| 2006 | A Method for Knowledge Modeling: Application of Unified Modeling Language (UML) to Knowledge ModelingabstractSince knowledge management (KM) is considered to be an important function of a successful business operation, many organizations are embracing KM. The success of a KM project is dependent upon its contents. This article presents a method for building an effective knowledge model that can help businesses to analyze and specify knowledge content. The method takes a decision-oriented view. For the modeling language of the method, Unified Modeling Language (UML) has been chosen. The method is applied to the vessel scheduling process in a maritime shipping company. The steps and rules are explained using an example, and the strengths and weaknesses of the method are discussed. Sung-Kwan Kim, Seong-bae Lim, Robert B. Mitchell |
Int. J. Knowl. Manag. | 1 |
| 1999 | Analysis of the Impacts of Overestimation Sources on the Accuracy of Worst Case Timing AnalysisabstractTo predict the worst case execution time (WCET) of real-time tasks, we should consider various factors (e.g., caching, pipelining, and infeasible paths) that affect the accuracy of the prediction. However some of them are inherently difficult to analyze statically, and thus may give rise to significant overestimation in WCET prediction. Therefore, for more accurate WCET prediction, we need to identify, such overestimation sources and analyze how much each of them can make overestimation. Then, such analysis results can be used to refine existing timing analysis techniques. In this paper we do not propose any new timing analysis techniques, but present quantitative analysis results on the impacts of overestimation sources on the accuracy of the worst case timing analysis. For this purpose, we use variance analysis based on a simulation-based methodology to make our analysis independent of any existing techniques. The results show that the dominant factor is pipelining analysis when the cache miss penalty is small and instruction caching analysis when the cache miss penalty is larger than 10 cycles. The results also show that although the impact of data caching analysis is small compared with that of pipelining or instruction caching analysis, if we ignore its effect in the WCET estimation, the WCET can be overestimated up to 275% even when the effects of the other factors are completely analyzed. Finally, the results show that the effects of infeasible paths are largely orthogonal to other analysis features and depend on program characteristics. Also, as for data caching, if infeasible paths are ignored in the WCET estimation, the accuracy of the WCET estimation is degraded significantly (up to 564%). Sung-Kwan Kim, Sang Lyul Min, Rhan Ha |
RTSS | 1 |
| 1995 | Worst Case Timing Analysis of RISC Processors: R3000/R3010 Case StudyabstractThis paper presents a case study of worst case timing analysis for a RISC processor. The target machine consists of the R3000 CPU and R3010 FPA (Floating Point Accelerator). This target machine is typical of a RISC system with pipelined execution units and cache memories. Our methodology is an extension of the existing timing schema. The extended timing schema provides means to reason about the execution time variation of a program construct by surrounding program constructs due to pipelined execution and cache memories of RISC processors. The main focus of this paper is on explaining the necessary steps for performing timing analysis of a given target machine within the extended timing schema framework. This paper also gives results from experiments using a timing tool for the target machine that is built based on the extended timing schema approach. Yerang Hur, Young Hyun Bae, Sung-Soo Lim, Sung-Kwan Kim, Byung-Do Rhee, Sang Lyul Min, Chang Yun Park, Heonshik Shin, Chong-Sang Kim |
RTSS | 4 |