EDBT 2026 Demo / reviewers in the wild / expert
Scott Seligman
dblp:65/1774
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1991
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware simulation
compiled simulation |
0.0 | 1 | 1991 | Automatic Generation of Compiled Simulations through Program Specialization · DAC 1991 |
Electronic design automation
hardware verification and test |
0.0 | 1 | 1991 | Automatic Generation of Compiled Simulations through Program Specialization · DAC 1991 |
Electronic design automation › hardware verification and test
logic simulation |
0.0 | 1 | 1991 | Automatic Generation of Compiled Simulations through Program Specialization · DAC 1991 |
Methods — techniques the papers use, named apart from their topics
program specialization · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1991 | Automatic Generation of Compiled Simulations through Program Specializationabstract1 Introduction As the size and complexity of digital circuits grows, so does need for logic simulation. Recent research has focused on compiled simulation because it provides substantially better performance than interpretive methods. In compiled simulation, a program is generated from the circuit to be simulated. Running this program, called a compiled simulator, then simulates the circuit. Compiled simulation executes much more rapidly than interpreted simulation because the overhead of tranversing and interpreting the data structure that describes the circuit is done only once, when the compiled simulator is created. Wing Yee Au 0001, Daniel Weise, Scott Seligman |
DAC | 3 |