This paper presents the design, FPGA implementation, and comprehensive security evaluation of a chaos-based image encryption algorithm derived from the Pseudo-Random Number Generator with two-dimensional Enhanced Lotka Volterra Map (PRNG-ELVM). The proposed ELVM introduces nonlinear perturbations that significantly enhance the chaotic dynamics and statistical behavior of the classical model, providing greater key sensitivity, a wider keyspace, and superior pseudorandomness suitable for cryptography. The proposed image encryption scheme incorporates confusion and diffusion stages driven by PRNG-ELVM sequences, where secret-key-dependent initial states and SHA-256-based image hash further strengthen security and resistance to differential attacks. The system is implemented on Altera DE2-115 FPGA using VHDL with parallel and pipelined processing to achieve real-time performance and low-hardware resource consumption. A comprehensive cryptographic evaluation is performed, including key sensitivity, histogram uniformity, correlation analysis, entropy measurement, floating frequency, NPCR/UACI metrics, robustness to noise and occlusion, and image quality degradation analysis (MSE, PSNR, SSIM). Experimental results confirm that the encrypted images exhibit uniform histograms, near-zero correlation, entropy values close to 8, and high resistance to differential perturbations. The FPGA implementation demonstrates high performance and efficient logic utilization, outperforming comparable chaotic hardware cryptosystems. Overall, the PRNG-ELVM-based FPGA architecture is an effective and scalable solution for secure image encryption in resource-constrained environments such as IoT, embedded multimedia, and biomedical imaging systems.

The current massive use of digital communications demands a secure link by using an embedded system (ES) with data encryption at the protocol level. The serial peripheral interface (SPI) protocol is commonly used by manufacturers of ESs and integrated circuits for applications in areas such as wired and wireless communications. We present the design and experimental implementation of a chaotic encryption and decryption algorithm applied to the SPI communication protocol. The design of the chaotic encryption algorithm along with its counterpart in the decryption is based on the chaotic Hénon map and two methods for blur and permute (in combination with DNA sequences). The SPI protocol is configured in 16 bits to synchronize a transmitter and a receiver considering a symmetric key. Results are experimentally proved using two low-cost dsPIC microcontrollers as ESs. The SPI digital-to-analog converter is used to process, acquire, and reconstruct confidential messages based on its properties for digital signal processing. Finally, security of the cryptogram is proved by a statistical test. The digital processing capacity of the algorithm is validated by dsPIC microcontrollers.