Decap allocation are the primary methods for addressing the dynamic voltage noise problem of on-chip power networks. When space in the immediate proximity of a hot spot is constrained, simply adding decoupling capacitance without improving the local wiring is ineffective. Based on this key observation we proposed an effecient co-optimization of decap allocation and local wiring enhancement. The method solves a linear program (LP) iteratively and is based on the decap budgeting algorithm [10]. Experimental results on two actual chip designs demonstrate the area and run-time efficiency of the co-optimization algorithm. Moreover, it provides excellent solutions even in cases where decap allocation alone fails to provide a feasible solution.

We propose a novel and efficient incremental analysis technique for 'what-if analysis of on-chip power distribution networks (PDN). Effect of local modifications to a PDN, including local topology changes, can be quickly analyzed without need for very expensive re-analysis of the entire modified network. We borrow ideas from a fictitious domain method that has been successfully used in solving partial differential equations arising from inhomogeneous problems in mechanics. The effect of local wiring modifications in several PDN regions is mimicked by applying fictitious currents at the boundaries of these regions in the original unmodified network. The fictitious currents are calculated from component sub-problems in a low-computation iterative procedure. The practicality of this method for use in what-if analysis is demonstrated with several large power networks from actual industrial designs. It analyzes a modified network with few million changes in a fraction of time it would take for a complete re-analysis.