Most hardware neural networks have a basic competitive learning rule on top of a more involved processing algorithm. This work highlights two basic learning rules/behavior: winner-take-all (WTA) and spike-timing-dependent plasticity (STDP). It also gives a design example implementing WTA combined with STDP in a position detector. A complementary metal-oxide-semiconductor (CMOS) and a memristor-MOS technology (MMOST) design simulation results are compared on the bases of power, area, and noise handling capabilities. Design and layout were done in 130-nm IBM process for CMOS, and the HSPICE model files for the process were used to simulate the CMOS part of the MMOST design. CMOS consumes area, 55-W max power, and requires a 3-dB SNR. On the other hand, the MMOST design consumes , 15-W max power, and requires a 4.8-dB SNR. There is a potential to improve upon analog computing with the adoption of MMOST designs.

The resonant tunneling diode (RTD) has found numerous applications in high-speed digital and analog circuits due to the key advantages associated with its folded back negative differential resistance (NDR) current-voltage (I-V) characteristics as well as its extremely small switching capacitance. Recently, the RTD has also been employed to implement high-speed and compact cellular neural/nonlinear networks (CNNs) by exploiting its quantum tunneling induced nonlinearity and symmetrical I-V characteristics for both positive and negative voltages applied across the anode and cathode terminals of the RTD. This paper proposes an RTD-based CNN architecture and investigates its operation through driving-point-plot analysis, stability and settling time study, and circuit simulation. Full-array simulation of a 128 times 128 RTD-based CNN for several image processing functions is performed using the Quantum Spice simulator designed at the University of Michigan, where the RTD is represented in SPICE simulator by a physics based model derived by solving Schrodinger's and Poisson's equations self-consistently. A comparative study between different CNN implementations reveals that the RTD-based CNN can be designed superior to conventional CMOS technologies in terms of integration density, operating speed, and functionality.