This paper presents the first experimental demonstration of fully Walsh-based wideband converters for Radio Frequency Front-End (RFFE) architecture implemented in 28 nm FDSOI CMOS technology. The system integrates a Walsh-based RF digital-to-analog converter (WDAC) and a Walsh-based RF analog-to-digital converter (WADC) designed for digital predistortion (DPD) applications. The WDAC achieves an instantaneous bandwidth of 4.7 GHz with an energy efficiency of 0.57 pJ/bit. The WADC achieves a 2.5 GHz bandwidth while consuming only 4 mW. The experimental demonstration showcase efficient wideband signal processing in the Walsh domain and highlights its potential as a promising paradigm for future low-power, high-throughput wireless transceivers, offering both wideband capabilities and a new order of scale energy efficiency.

Millimeter-wave bands open new bands of interest for ultra-high-speed wireless communications, but face technological bottlenecks such as power amplification. Working near the maximum oscillation frequency of the transistor leads to low intrinsic gain and low efficiency. Digital predistortion (DPD) achieves a higher power efficiency without degrading linearity. This paper presents a co-simulation workflow to design jointly DPD and the power amplifier (PA) in order to reach the optimum performances in linearity and power-added efficiency (PAE). The design of a PA at a center frequency of 142 GHz using the CMOS 28nm FDSOI technology from STMicroelectronics demonstrates how the design flow can take into account continuous wave (CW) and modulated signal simulations with and without DPD. The linearity performance is highlighted on the adjacent channel power ratio (ACPR) with an improvement of 4dB on an OFDM signal with 800 MHz bandwidth.

This paper presents a highly compact Ku band 130nm SiGe power amplifier (PA) in a double balanced architecture. A highly compact low-loss 4 to 1 combiner is associated with a cascode topology to provide a power combination up to 1W and a high resilience to the standing wave ratio (SWR) from 2:1 to 4:1. A high thermal stability up to 120°C is ensured by an advanced configuration of transistors. A choices innovative set on the cascode stage design and layout improves the control of the impact ionization and selfheating. A driver stage allows the circuit to achieve over 20 dB of linear gain. At 30°C, 18 GHz and a supply voltage ($\text{V}_{\mathrm {SUPPLY}}$) of 4.2V, this power amplifier achieves a measured saturated power ($\text{P}_{\mathrm {sat}}$) of 30 dBm for an output power at the 1dB compression point (OCP$_{\mathrm {1dB}}$) of 28.8 dBm, a maximum power added efficiency (PAE) of 23.5% and a linear gain of 21.4 dB. The gain difference across 2:1 SWR phase variations is only 0.8 dB. The active area of the die chip is only 1.13 mm2.

A novel non-linear adaptive filter for the linearization of Radio Frequency (RF) Power Amplifiers (PAs) is presented. In this study, we aim at reducing the Digital Predistortion (DPD) complexity and enhancing its convergence speed for reduced computation time. The Walsh Transform is used as a computational basis for evaluating a predistorter (PD) model. The mathematical properties of the Walsh theory are exploited to adapt a memory polynomial (MP) in the sequency domain. A block-based Walsh LMS is introduced to seek the optimal PD coefficients. Simulations and results of linearization of class-AB PAs are exhibited. The comparison with conventional DPD algorithms shows that the proposed method converges 10 times faster with a reduction of 12% of the complexity for similar accuracy. Finally, a complete DPD architecture based on the Walsh Transform is proposed.

We present a method to automatically match a system to the load variation accurately with a very short matching time for Ultra Low Power medical applications. A demonstrator was fabricated and an experimental set-up in the Medical Implant Communication System (MICS) frequency band of 402–405MHz was realized including a pacemaker antenna prototype immersed on a homogeneous lossy liquid. The matching network consists of a low pass π structure with tunable components made of varactors. Methodologies for simplifying the matching network design are introduced. The measurements show that a S11 up to −30dB is obtained with a matching time of 900µs.

We present the design and implementation of linear-phase delay filters for ultra-low power neural signal processing. The filters are intended to implement a low-distortion delay element for automatic biopotential detection in neural recording implants. Continuous-time OTA-C filters are used to realize a 9th-order equiripple transfer function presenting a constant group delay. This analog delay allows to process neural waveforms with reduced overhead compared with digital delays. An allpass transfer function is used to implement such analog delay because it achieves wider constant-delay bandwidth than all-pole does. Two filters realizations are compared for implementing it: the cascaded structure and the inverse follow-the-leader feedback filter. Their respective strengths and drawbacks are assessed by modeling parasitics and non-idealities of OTAs, and using transistor-level simulations. A power budget of 200 nA is used in both filters. Experimental measurements with the chosen topology are presented and discussed.

This paper presents a 65 nm CMOS power amplifier (PA) using a coupled transformer. The PA is based on an original structure, called stacked folded fully differential structure (SFFDS). It is applied to the UMTS W-CDMA standard. The parallel SFFDS power amplifier provides 30.5 dBm of output power with 20% of power added efficiency (PAE) at 1.95 GHz. The output compression point (OCP1) is 27.5 dBm and the PA is linear up to 24 dBm in order to meet the maximum output power required by the UMTS W-CDMA standard.

This paper investigates the feasibility of designing a RF TX architecture based on a Power VCO, operating at 1.95 GHz for UMTS/WCDMA standard. The Power VCO uses 2.5 V supply voltage and is designed using 65 nm CMOS technology from ST Microelectronics. The Power VCO is made up of an oscillating Power Amplifier (PA). In order to fulfil UMTS/W-CDMA requirements, especially on output power with regards to efficiency to save battery life, the used PA is a two-stage Class E PA. The output 1 dB compression point (CP1) is 22 dBm and Power Added Efficiency (PAE) @CP1 is 55.1%. This PA is then included in a loop to realize oscillation condition. The Power VCO oscillates @ 1.95 GHz, achieves an output power of 23.3 dBm with 60.3% PAE.

We present a broadband, compact and scalable equivalent circuit model for on-chip transformers with patterned ground shield fabricated in silicon IC technology. The model is driven from the layout and process technology specifications. It is suitable for design optimization and circuit simulation. Verification with measurement data from SiGe process demonstrates performance prediction and excellent scalability of the model.

Filters are an integral part of any communication or electronic warfare system. They are used extensively in electronic countermeasures, instrumentation and satellite communication. There are numerous types of filters that can be used at microwave frequencies, nevertheless the main drawback of a waveguide filter is its large size at lower microwave frequencies. For this reason, the one structure that can provide smaller size is the evanescent mode filter. A complete design procedure is presented for an evanescent mode filter, which does not require special tuning techniques. This method covers the case of a rectangular waveguide structure, which is composed of an air-filled waveguide containing a number of dielectric inserts operating in the normal propagative mode, while air-filled sections are evanescent. The technique consists of finding a scattering description of all the filter sections and junctions. This search stems from an exhaustive electromagnetic study of the field quantities and requires modal analysis methods. A genetic algorithm optimisation has been developed and included, and rules are provided to assist designers in their search for the best results. Examples of waveguide filters with various orders are simulated for a given cross section, permittivity and step size. The filters' section lengths are evaluated such that the best response according to designer specifications is achieved.