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Masao Kakimoto

dblp:66/3771 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1987
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › physical design
layout optimization		 0.011987
TRIP: An Automated Technology Mapping System · DAC 1987
Electronic design automation
logic synthesis		 0.011987
TRIP: An Automated Technology Mapping System · DAC 1987
Electronic design automation
physical design		 0.011987
TRIP: An Automated Technology Mapping System · DAC 1987
Electronic design automation › logic synthesis
technology mapping		 0.011987
TRIP: An Automated Technology Mapping System · DAC 1987
Electronic design automation › design methodology
technology migration		 0.011987
TRIP: An Automated Technology Mapping System · DAC 1987

Methods — techniques the papers use, named apart from their topics

rule base · 0.0partitioning · 0.0
YearPublicationVenuePosition
1987 TRIP: An Automated Technology Mapping System
abstract
A technology mapping system, used for computer design in NEC, is presented. The features of this system are technology conversion and logical/physical optimization, based on a rule base, partitioning support, conversion verification and special layout consideration. This system is practically used for many applications for technology mapping, including redesigning an existing total unit into a new unit, based on up-to-date LSI technology. The resulting effect is quick inputting of integrated circuit technology progress into practical computer design area.
Shigenobu Suzuki, Tatsushige Bitoh, Masao Kakimoto, Kazutoshi Takahashi, Takao Sugimoto
 DAC3