Two-dimensional arrays of microprocessors are considered for the implementation of image processors that are formulated according to a certain state-space model. The microprocessors are totally synchronized—operating with the same clock and executing the same instructions, communicating with each other through local memory units. This allows the use of such an array as a pipeline for the processing of successive images or sections of one image, to achieve a relatively fast effective speed.

A model for two-dimensional linear iterative circuits is defined in the form of matrix equations. From the matrix equations, a two-dimensional characteristic function is defined. It is then proved that a matrix satisfies its two-dimensional characteristic function. This property is used to form a diagnostic matrix. Finally, the diagnostic matrix is used in a minimization technique.

The general response of a linear sequential circuit involves a transition matrix in the form of a matrix A raised to a variable power. The power becomes arbitrarily high causing the direct computation of the transition matrix to become very cumbersome. This correspondence demonstrates that A, having finite-field elements, may be transformed into a matrix of real numbers. Known methods may then be applied to this real matrix to simplify computing a power of it. The result is then transformed back to the finite field which is the desired result However, numerical difficulties as mentioned in the conclusion prevent this method from being the final solution to the problem.

This paper fornulates a state-space model for linear iterative circuits having more than one spatial dimension. A new type of matrix operation is introduced that allows treatment of such models in a relatively straightforward manner. Finally, a form for the general response is developed in terms of this new matrix operation.

A method of solving a system of simultaneous equations within a multiple-valued logic algebra is presented.