Demo Data from EDBT 2026 / reviewers in the wild / expert
Daniel L. Palumbo
dblp:66/4556
· DBLP profile ↗
2ranked-venue papers
1as first author
0since 2021 · last 1994
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 1Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Distributed systems · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Distributed systems › clock synchronization
clock skew bound |
0.0 | 1 | 1994 | The Derivation and Experimental Verification of Clock Synchronization Theory · IEEE Trans. Computers 1994 |
Distributed systems
clock synchronization |
0.0 | 1 | 1994 | The Derivation and Experimental Verification of Clock Synchronization Theory · IEEE Trans. Computers 1994 |
Distributed systems
fault tolerance |
0.0 | 1 | 1994 | The Derivation and Experimental Verification of Clock Synchronization Theory · IEEE Trans. Computers 1994 |
Methods — techniques the papers use, named apart from their topics
mathematical derivation · 0.0experimental verification · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1994 | The Derivation and Experimental Verification of Clock Synchronization TheoryabstractThe objective of this work is to validate mathematically derived clock synchronization theories and their associated algorithms through experiment. Two theories are considered, the Interactive Convergence Clock Synchronization Algorithm and the Mid-Point Algorithm. Special clock circuitry was designed and built so that several operating conditions and failure modes (including malicious failures) could be tested. Both theories are shown to predict conservative upper bounds (i.e., measured values of clock skew were always less than the theory prediction). Insight gained during experimentation led to alternative derivations of the theories. These new theories accurately predict the clock system's behavior. It is found that a 100% penalty is paid to tolerate worst case failures. It is also shown that under optimal conditions (with minimum error and no failures) the clock skew can be as much as 3 clock ticks. Clock skew grows to 6 clock ticks when failures are present. Finally, it is concluded that one cannot rely solely on test procedures or theoretical analysis to predict worst case conditions.> Daniel L. Palumbo |
IEEE Trans. Computers | 1 |
| 1993 | Performance and fault-tolerance of neural networks for optimizationabstractThe fault-tolerance characteristics of time-continuous, recurrent artificial neural networks (ANNs) that can be used to solve optimization problems are investigated. The performance of these networks is illustrated by using well-known model problems like the traveling salesman problem and the assignment problem. The ANNs are then subjected to up to 13 simultaneous stuck-at-1 or stuck-at-0 faults for network sizes of up to 900 neurons. The effect of these faults on the performance is demonstrated, and the cause for the observed fault-tolerance is discussed. An application is presented in which a network performs a critical task for a real-time distributed processing system by generating new task allocations during the reconfiguration of the system. The performance degradation of the ANN under the presence of faults is investigated by large-scale simulations and the potential benefits of delegating a critical task to a fault-tolerant network are discussed. Peter Protzel, Daniel L. Palumbo, Michael K. Arras |
IEEE Trans. Neural Networks | 2 |