Demo Data from EDBT 2026 / reviewers in the wild / expert
David S. Lindsay
dblp:66/5035
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1976
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Performance modeling and evaluation · 87% Processor architecture and microarchitecture · 13% |
Topics — the 2 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Performance modeling and evaluation
benchmarking |
0.0 | 1 | 1976 | A hardware monitor study of a CDC KRONOS system · SIGMETRICS 1976 |
Performance modeling and evaluation › performance monitoring
hardware monitoring |
0.0 | 1 | 1976 | A hardware monitor study of a CDC KRONOS system · SIGMETRICS 1976 |
Methods — techniques the papers use, named apart from their topics
hardware monitoring · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1976 | A hardware monitor study of a CDC KRONOS systemabstractThis study was performed on a CDC-6600 computer having 500K of Extended Core Storage (ECS), twenty Peripheral Processor Units (PPU's) and twenty-four I/O channels, as shown in Figure I-1. The CPU can load, store, and execute from the 131K of 1 microsecond storage which comprises CM. It can also access ECS, but this access is limited to transferring blocks of data between CM and ECS at the rate of ten 60-bit words per microsecond. The CPU cannot access peripheral devices in any manner whatever. David S. Lindsay |
SIGMETRICS | 1 |