We present an analytical model for a multicast-pushout write policy. The pushout scheme maintains a high switch throughput by providing an optimum balance of unicast and multicast cells in the buffer. The scheme is adaptive to changes in multicast traffic such as changing fanout sizes and input rates. We demonstrate that the model is accurate for various loads, ratios of multicast traffic and fanout sizes.

The low cell loss rates required from ATM switches can be achieved with shared-memory based switches using large buffers. In this paper we present a fluid flow model for replicata-at-send distinct address queue multicasting in a shared-memory switch. Due to its buffer independence the model can calculate the performance of large buffered switches. The proposed model significantly reduces computational times and produces results that closely approximate simulation. In some cases the model can produce results which are difficult to obtain via simulation, without resorting to special techniques such as importance sampling.

Replicate-at-send multicasting has the best performance of the multicasting schemes for shared-memory ATM switches. Specifically replicate-at-send-distinct address queue multicasting is the most adopted implementation because of its low hardware requirements. We present an analytical model for shared-memory switches with replicate-at-send-distinct address queue multicasting. Under various input traffic conditions the analytical model is shown to be accurate when compared to simulation results. We demonstrate that the model is accurate for a range of loads, with different ratios of multicast traffic and for a range of fanout sizes.

The importance of multicasting at the switch level is increasing with the number of applications that are demanding multicast services. We extend a fluid-flow model for unicast only shared-memory switches to include replicate-at-receive multicasting. The advantage of fluid-flow models is that they are buffer independent. This overcomes the state explosion problem experienced with Markov chain models when using large sized buffers. Our proposed model reduces the complexity of the switch so that the problem only requires the analysis of a single output queue. Under various input traffic conditions the performance of the model is compared against results obtained via simulation. With shorter computational time the proposed model produces results comparable to those from simulation.

This paper describes a new technique for detecting security breaches in a computer system. For each Unix process, the user credentials, which are user identifiers, determine the process privilege, including whether a process has gained a high privilege, such as that of the superuser. The state transition technique is applied to a suitably defined process state, identified by certain classes of user credential values. A transition takes place when these values change from one class to another. These states are clearly defined, and prohibited state transitions as well as some supporting rules are identified. When many break-ins succeed, either the rules are violated or these prohibited transitions occur, and this implies a violation of system security policy. A specially modified system call, ktrace0, is used by the superuser to monitor the process-state and state transition analysis is applied to the traced information, by the Intrusion Detection System. Tests show that most known security violations belonging to the targeted classes (such as buffer overflow exploits) can be detected (and possibly pre-empted) while the constituent activities are still being processed in the kernel.

The framework of the performance analysis for a buffered asynchronous transfer mode (ATM) switch usually consists of modeling the input traffic arrivals, the switching mechanism, and the cell departure process. The overall accuracy of the performance results relies on how accurately the cell departure process, especially for shared buffer switches is modelled. Unlike output buffer switches where there are at most one cell that can leave, multiple cells may depart from the shared buffer for shared buffer switches. Modeling the cell departure process is hence more complex for shared buffer switches. It is of practical interest and is challenging to find the appropriate probabilistic model to describe the cell departure process for shared buffer switches. This paper compares and verifies the accuracy of three models, including a new one called "Urn Model" proposed by the authors. These models are put under test in a performance evaluation of a shared buffer ATM switch, by using a discrete-time Markov chain. The numerical results are compared to the simulation, and they show that the Urn Model is a good compromise between accuracy and efficiency. This finding is significant because it helps to speed up running an analytical model of a large network while providing satisfactory accuracy.

Currently, network codes based on the primal simplex algorithm are believed to be computationally superior to those based on other methods. Some modifications of the out-of-kilter algorithm of Ford and Fulkerson are given, together with proofs of their correctness and computer implementations using appropriate data structures. The computational tests in this paper indicate that the final code based on these modifications is superior to any previously implemented version of this algorithm. Although this code is not competitive with state-of-the-art primal simplex codes, its performance is encouraging, especially in the case of assignment problems.

The problem of encoding a discrete memoryless source with respect to a single-letter fidelity criterion, using a block code of lengthnand rateR, is considered. The probability of error,p_{n}(R,D), is defined to be the minimum probability, over all such codes, that the source will generate a sequence which cannot be encoded with distortionDor less. For sufficiently largeR, thatp_{n}(R,D)decreases doubly exponentially with blocklength,nis shown. It is known thatp_{n}(R,D) = 0for some finiten, denoted byn_{0}(R,D). An upper bound ton_{0}(R,D)is also presented and numerically evaluated. The results derived hold independently of the source statistics. It is shown that a theorem of Omura and Shohara for symmetric sources is a special case of the results herein. Additionally, a useful characterization ofR \ast (D)for row-balanced distortion matrices is obtained.

Campbell has given a generalized Kraft inequality and related results for decoding with respect to a fidelity criterion. His results are, however, restricted to "row-balanced" distortion matrices for finite-alphabet sources. We generalize these results to any distortion matrix.