This article presents a Built-in self-test (BIST) solution for polar transceivers with low cost and high accuracy. Radio frequency (RF) Polar transceivers are desirable for portable devices due to higher power efficiency compared to traditional RF Cartesian transceivers. Unfortunately, their design is quite challenging due to substantially different signal paths that need to work coherently to ensure signal quality. In the receiver, phase and gain mismatches degrade sensitivity and error vector magnitude. In the transmitter, delay skew between the envelope and phase signals and the finite envelope bandwidth can create intermodulation distortion, which leads to violation of spectral mask requirements. Typically, these parameters are not directly measured but calibrated through spectral analysis using expensive RF equipment, leading to lengthy and costly measurement/calibration cycles. However, characterization and calibration of these parameters with analytical model would reduce the test time and cost considerably. In this article, we propose a technique to measure with the intent to calibrate impairments of the polar transceiver in the loop-back mode. Simulation and hardware measurement results show that the proposed technique can characterize the targeted impairments accurately.

This paper presents a Built-in self-test (BIST) solution for polar transmitters with low cost. Polar transmitters are desirable for portable devices due to higher power efficiency they provide compared to traditional Cartesian transmitters. However, they generally require iterative test/measurement/calibration cycles. The delay skew between the envelope and phase signals and the finite envelope bandwidth can create intermodulation distortion (IMD) that leads to the violation of the spectral mask and error vector magnitude (EVM) requirements. Typically, these parameters are not directly measured but calibrated through spectral performance analysis using expensive RF equipment, leading to lengthy and costly measurement/calibration cycles. Characterization and calibration of these parameters inside the device would reduce the test time and cost considerably. In this paper, we propose a technique to measure the delay skew and the finite envelope bandwidth, two parameters that can be digitally calibrated, based on the measurement of the output of the receiver in the loop-back mode. Simulation and hardware measurement results show that the proposed technique can characterize the targeted impairments in the polar transmitter accurately.

This paper presents a process-variation tolerant, continuously channel-adaptive wireless front-end architecture and related adaptation algorithms to allow a radio-frequency transceiver to function with minimum power at all channel conditions and manufacturing process corner. Current wireless transceiver front-ends are designed for worst case channel conditions and a limited degree of post manufacture tuning is performed to compensate for process variations. It is shown how the proposed architecture can result in significant power savings over current practice without compromising system-level bit-error rate (while keeping the end-user experience unaffected). In contrast to traditional wireless circuits with limited tunability, such a zero-margin design is achieved by close loop adaptation of the wireless front-end circuits to ensure that they only consume the minimum power and deliver just enough performance (and not any more) for any channel condition. The adaptation methodology is applied to a WLAN receiver design and hardware measurement data for an adaptive receiver is presented showing a > 3 × power improvement under best case channel conditions.

Error-vector-magnitude (EVM) is a system level specification that determines the overall modulation quality and exhibits strong correlation to the inherent nonidealities of a radio frequency (RF) system. In production testing, EVM tests incur significant cost due to the large number of symbols required to ensure test quality. In our approach, EVM is decomposed into its deterministic (due to static impairments: IQ mismatch, gain, AM-AM and AM-PM) and random (due to dynamic impairments: VCO phase noise, thermal noise) components. The static impairments are computed from the device under test (DUT) response to an optimized multitone test input. The dynamic impairments are computed using signal processing algorithms from the DUT test response to the same test input. The EVM of the RF system is then derived from the computed static and dynamic impairments, respectively. Experimental results show that significant reduction in test time is possible without compromising EVM test quality.

In this paper, a novel built-in tuning technique to compensate for variability induced imperfections in RF subsystems is proposed. The test stimulus is obtained from a filtered digital pattern and the RF response is down-converted using an envelope detector. The resulting signal is mapped to a digital signature, such that the Hamming Distance between the observed and the golden signature represents the degree by which the circuit specifications (Gain, IIP3, EVM, etc) differ from the ideal. A hardware driven algorithm is used to minimize this Hamming Distance to concurrently optimize (tune) multiple RF specifications. As opposed to prior research, the method does not require the use of an on-chip digital signal processor and uses minimal on-chip hardware. Results obtained on a 2.4 GHz transmitter subsystem show significant impact of tuning on device specifications.

In this paper, a novel methodology for continuous real time monitoring of the performance metrics of RF front end modules is proposed. The presented technique involves determination of the RF system parameters using time domain parameter estimation techniques with minimal hardware overhead. The computation of the behavioral parameters of the RF modules is performed at periodic intervals using real time signals through the use of a "parallel model" of the RF front end in the baseband DSP. During specific intervals corresponding to high signal power levels, parameter estimation of the RF front end is performed using a model in the baseband as a reference. The presented technique is used for detection/tracking of performance degradation in analog/RF front ends in real-time and does not require the use of supervised learning algorithms as with prior performance monitoring techniques. Simulation results showing accurate tracking of the distortion parameters of an RF transmitter used to demonstrate the core ideas of this research.

In this paper, a holistic yield recovery approach based on post manufacture tuning of RF circuits and systems under large as well as small multi-parameter process variations is developed. Marginally failing devices (small parameter deviations) are tuned using a nonlinear ¿Augmented Lagrange¿ algorithm driven optimization engine that includes test specification values and power consumption in its optimization framework. A novel built-in alternate tuning test is used to explicitly evaluate all the DUT specifications at each optimization iteration. For large parameter deviations well beyond the test specification limits of the DUT, determination of the different specification values is difficult. Such devices are tuned using a golden response tuning approach which optimizes the DUT specifications implicitly until the DUT is ¿good enough¿ to be tuned by the prior Augmented Lagrange algorithm. The proposed methodology enables yield recovery of devices not possible with earlier methods, avoids local minima and can be implemented at low cost.

In this paper, a low-cost test methodology for dynamic specifications of high precision sigma-delta (ΔΣ) analog-to-digital converters (ADCs) is presented. Dynamic testing of ADCs requires an input test stimulus with total harmonic distortion (THD) and signal-to-noise ratio (SNR) about 10dB better than the ADC under test. ΔΣ ADCs are inherently high resolution converters with excellent THD and SNR due to their inherent over-sampling, averaging and noise shaping properties. In the proposed test methodology, the back end digital and decimation filters of such converters are turned off and the digital pulse sequence at the output of the sigma-delta modulator is made externally observable for test purposes. It is seen that ENOB, THD and SNR of the converter can be determined with significantly increased sensitivity to device nonlinearities and noise allowing the use of less than ideal input stimulus than otherwise or significantly reduced test time. The back-end filters are then tested using traditional digital test techniques. Simulation results show the usefulness of the proposed test methodology.

In this paper, a fast RF BIST-driven post-manufacture tuning methodology for yield improvement of RF transceiver systems is presented. The core algorithms optimize multiple transceiver performance metrics concurrently using a hardware-iterated gradient search algorithm that uses diagnostic BIST data to guide the tuning of circuit and software level parameters. Intelligent ¿initial guess¿ values for the circuit and software tuning knobs at the start of the tuning process allow rapid convergence. Power consumption is given key consideration through the tuning process. Further, self-tuning is performed with little or no external tester support. The viability of the proposed scheme has been demonstrated through an experimental RF hardware prototype. Experimental results demonstrate significant yield recovery while allowing up to 10X savings in test/tuning time.

Linearity testing of high resolution analog-to-digital Converters (ADCs) requires test instrumentation that has high precision digital-to-analog conversion (DAC) capability. Further, a large number of samples need to be collected for linearity testing of high resolution ADCs (18-24 bit) to guarantee test quality. In this paper a novel fast linearity testing approach is proposed for testing high resolution ADCs using a low precision DAC and a potentiometer. A polynomial fit of the transfer function of the ADC is generated using measurements made at intermediate code points. The test setup and analysis procedure makes no assumption about the linearity of the lower precision DAC or the potentiometer used to generate the ADC test stimulus. A least squares based polynomial fitting approach is used to characterize the transfer function of the ADC. The computed transfer function is then used to estimate the Integral Non-Linearity (INL) and the Differential Non-Linearity(DNL) of the system accurately. Software simulations and hardware experiments are performed to validate the proposed methodology.

Design and test of high-speed mixed-signal/RF circuits and systems is undergoing a transformation due to the effects of process variations stemming from the use of scaled CMOS technologies that result in significant yield loss. To this effect, post-manufacture tuning for yield recovery is now a necessity for many high-speed electronic circuits and systems and is typically driven by iterative test-and-tune procedures. Such procedures create new challenges for manufacturing test and built-in self-test of advanced mixed-signal/RF systems. In this paper, key test challenges are discussed and promising solutions are presented in the hope that it will be possible to design, manufacture and test ¿truly self-healing¿ systems in the near future.

Polar radio architectures are attractive due to the ability to implement them using largely digital architectures. However, testing for specs such as EVM incurs significant test time due to the large numbers of symbols that need to be transmitted. In our approach, EVM is modeled as a function of the system static non-idealities (IQ mismatch, gain, IIP3 parameters) and dynamic non-idealities (VCO phase noise). Using a multi-tone test stimulus, the static and dynamic non-idealities are estimated first. The data generated is used to predict EVM using machine learning methods with high accuracy while incurring minimal test time.

In this paper, a process tunable, continuously adaptive wireless front end architecture and related adaptation algorithms are presented that allow an RF transceiver to function at minimum power irrespective of channel conditions and process variability induced performance loss in the RF front end and baseband interface. Current wireless transceiver front ends are designed for worst case channel conditions and a limited degree of post manufacture tuning is performed to compensate for process variations. It is shown how the proposed architecture can result in significant power savings over current practice without compromising system-level bit error rate. The adaptation methodology is applied to a WLAN transceiver design and hardware measurement data for an adaptive receiver is presented.

In production testing of wireless systems, measurement of EVM (a critical spec that is directly related to bit error rate) incurs significant test time due to the large numbers of symbols that need to be transmitted for reasons of accuracy. In our approach, EVM is modeled as a function of the system static non-idealities (IQ mismatch, gain, IIP3 parameters) and dynamic non-idealities (system noise, VCO phase noise). Using a selected subset of the OFDM tones, the static parameters are calculated first. These are then used to facilitate noise estimation using a back-end constellation compensation and noise amplification procedure. The data generated is used to predict EVM using machine learning methods. Significant reduction in test time is achieved with little loss in test accuracy.

In this paper, a novel adaptive calibration technique for advanced RF front-ends is proposed in which sensors are implanted in the transmitter and the observed device test response to a special calibration test is compared against the known golden response to the same. Tuning 'knobs' which are built into the circuit are then used to minimize the error between the observed response and the golden response using an iterative tuning approach. In addition to circuit-level tuning, adaptive digital compensation techniques are employed in the baseband processor. It is shown that this results in increased transmit signal dynamic range over existing techniques and accurate loopback testing of the transceiver modules.

At the present time, coordinated EDA tools for RF/mixed-signal pin test do not exist. In this paper, a CAD tool for efficient production testing of high- performance RF systems using low-cost baseband ATE is presented The CAD tool consists of a custom developed genetic ATPG for spectral (Fourier spectrum) signature-based alternate (to full specification-based tests) test of RF systems and involves co-simulation of scalable behavioral-level models of the RF System-Under-Test, baseband ATE test instrumentation, loadboard resources, and DfT resources for fast test vector optimization/generation. The CAD tool also enables the evaluation of various low-cost ATE architectures on the impact of the generated tests to provide a cost-effective solution.

Recent advances in radio systems engineering have enabled the design of multiple RF front ends (transmitters and receivers), each servicing specific RF communication standards across different frequency bands in a single electronic package. While the design aspects of such radios have been rigorously researched, the test aspects are still evolving. This paper proposes a novel `alternate cross-loopback testing' scheme for a multi-hardware radio using an `optimized' multi-tone test input. In this approach, the transmitter corresponding to one RF standard is used to test receivers corresponding to the same or different communication standards and operating frequency bands. The test approach is compatible with half-duplex operation of the transceiver front-ends and works with all the signal modulation and demodulation software turned "off". Cross-loopback is achieved via a broadband mixer, a programmable VCO and attenuator in the loopback path. The multi-sine tests allow accurate prediction of all transmitter and receiver specifications

In this paper, a novel on-line error detection technique for wireless RF transmitters is proposed. Spectral features of the real time streaming data are monitored at the baseband input of the system to trigger the on-line tests whenever specific conditions on these spectral features are met. Embedded spectral sensors at specific RF nodes that generate DC output values are used to monitor the spectral response signature of the system to the real time data. The spectral features at the baseband input and the corresponding spectral signature at the RF node are jointly processed by the DSP in the system to determine the 'health' of the transmitter. The major contribution of this work is in the development of an error detection scheme that determines the health of the complex RF systems based on random streaming data as opposed to prior test methods that rely on the use of a controlled test stimulus and therefore must be run off-line

Recent advances in thin film micromachining techniques have spurred a new generation of smart systems incorporating microelectromechanical systems (MEMS). Extracting the mechanical properties of MEMS devices has always been a challenge in terms of test time and test cost due to difficulties associated with accurate characterization of thin films. This paper describes a novel technique for diagnosing the mechanical parameters of a cantilever-beam accelerometer using purely electrical test stimulus. The beam is stimulated with an optimized test stimulus, generated by a gradient-based search method. The response measurements made on the MEMS device are mapped to the mechanical properties of the beam using a regression-based mapping technique. Using this method, the mechanical parameters associated with the beam can be estimated within an accuracy of 5% of their actual values. In addition, the test approach is amenable to a compact built-in test solution.