We design quantum circuits by using the standard cell approach borrowed from classical circuit design, which can speed up the layout of circuits with a regular structure. Our standard cells are general and can be used for all types of quantum circuits: error-corrected or not. The standard cell approach enables the formulation of layout-aware routing algorithms. Our method is directly applicable to neutral atom quantum computers supporting qubit shuttling. Such computers enable zoned architectures for memory, processing and measurement, and we design circuits using qubit storage (memory and measurement zones) and standard cells (processing zones). Herein, we use cubic standard cells for Toffoli gates and, starting from a 3D architecture, we design a multiplication circuit. We present evidence that, when compared with automatic routing methods, our layout-aware routers are significantly faster and achieve shallower 3D circuits (by at least 2.5×), while also reducing routing costs. Additionally, our co-design approach can be used to estimate the resources necessary for a quantum computation without using complex compilation methods. We conclude that standard cells, with the support of layout-aware routing, pave the way to very-large-scale methods for quantum circuit compilation.

The quantum circuit layout (QCL) problem involves mapping out a quantum circuit such that the constraints of the device are satisfied. We introduce a quantum circuit mapping heuristic, QXX, and its machine learning version, QXX-MLP. The latter automatically infers the optimal QXX parameter values such that the laid out circuit has a reduced depth. In order to speed up circuit compilation, before laying the circuits out, we use a Gaussian function to estimate the depth of the compiled circuits. This Gaussian also informs the compiler about the circuit region that influences most the resulting circuit’s depth. We present empiric evidence for the feasibility of learning the layout method using approximation. QXX and QXX-MLP open the path to feasible large-scale QCL methods.

Quantum circuits are difficult to simulate, and their automated optimisation is complex as well. Significant optimisations have been achieved manually (pen and paper) and not by software. This is the first in-depth study on the cost of compiling and optimising large-scale quantum circuits with state-of-the-art quantum software. We propose a hierarchy of cost metrics covering the quantum software stack and use energy as the long-term cost of operating hardware. We are going to quantify optimisation costs by estimating the energy consumed by a CPU doing the quantum circuit optimisation. We use QUANTIFY, a tool based on Google Cirq, to optimise bucket brigade QRAM and multiplication circuits having between 32 and 8,192 qubits. Although our classical optimisation methods have polynomial complexity, we observe that their energy cost grows extremely fast with the number of qubits. We profile the methods and software and provide evidence that there are high constant costs associated to the operations performed during optimisation. The costs are the result of dynamically typed programming languages and the generic data structures used in the background. We conclude that state-of-the-art quantum software frameworks have to massively improve their scalability to be practical for large circuits.

In the past years, quantum computers more and more have evolved from an academic idea to an upcoming reality. IBM's project IBM Q can be seen as evidence of this progress. Launched in March 2017 with the goal to provide access to quantum computers for a broad audience, this allowed users to conduct quantum experiments on a 5-qubit and, since June 2017, also on a 16-qubit quantum computer (called IBM QX2 and IBM QX3, respectively). Revised versions of these 5- and 16-qubit quantum computers (named IBM QX4 and IBM QX5, respectively) are available since September 2017. In order to use these, the desired quantum functionality (e.g., provided in terms of a quantum circuit) has to be properly mapped so that the underlying physical constraints are satisfied-a complex task. This demands solutions to automatically and efficiently conduct this mapping process. In this paper, we propose a methodology which addresses this problem, i.e., maps the given quantum functionality to a realization which satisfies all constraints given by the architecture and, at the same time, keeps the overhead in terms of additionally required quantum gates minimal. The proposed methodology is generic, can easily be configured for similar future architectures, and is fully integrated into IBM's SDK. Experimental evaluations show that the proposed approach clearly outperforms IBM's own mapping solution. In fact, for many quantum circuits, the proposed approach determines a mapping to the IBM architecture within minutes, while IBM's solution suffers from long runtimes and runs into a timeout of 1 h in several cases. As an additional benefit, the proposed approach yields mapped circuits with smaller costs (i.e., fewer additional gates are required). All implementations of the proposed methodology are publicly available at http://iic.jku.at/eda/research/ibm_qx_mapping.

In March 2017, IBM launched the project IBM Q with the goal to provide access to quantum computers for a broad audience. This allowed users to conduct quantum experiments on a 5-qubit and, since June 2017, also on a 16-qubit quantum computer (called IBM QX2 and IBM QX3, respectively). In order to use these, the desired quantum functionality (e.g. provided in terms of a quantum circuit) has to properly be mapped so that the underlying physical constraints are satisfied - a complex task. This demands for solutions to automatically and efficiently conduct this mapping process. In this paper, we propose such an approach which satisfies all constraints given by the architecture and, at the same time, aims to keep the overhead in terms of additionally required quantum gates minimal. The proposed approach is generic and can easily be configured for future architectures. Experimental evaluations show that the proposed approach clearly outperforms IBM's own mapping solution with respect to runtime as well as resulting costs.

We provide a basic introduction of the core ideas and theory surrounding fault-tolerant quantum computation. Quantum fault-tolerance essentially refers to avoiding the uncontrollable cascade of errors caused by the interaction of quantum-bits. The presented concepts underlay the theoretical framework of large-scale quantum computation and are the driving force for many recent experimental efforts to construct small to medium sized arrays of controllable quantum bits. We examine the basic principles of redundant quantum encoding, required to protect quantum bits from errors generated from both imprecise control and environmental interactions. The novelty of this work consists in the presentation of fault-tolerance principles from a classical distributed computing perspective, as this enables a more straightforward introduction without sacrificing generality. The practicality of fault-tolerant quantum computing is analysed after introducing a metric of scalability and discussing the factors influencing it.

The realisation of large-scale quantum computing is no longer simply a hardware question. The rapid development of quantum technology has resulted in dozens of control and programming problems that should be directed towards the classical computer science and engineering community. One such problem is known as Pauli tracking. Methods for implementing quantum algorithms that are compatible with crucial error correction technology utilise extensive quantum teleportation protocols. These protocols are intrinsically probabilistic and result in correction operators that occur as byproducts of teleportation. These byproduct operators do not need to be corrected in the quantum hardware itself, but are tracked through the circuit and output results reinterpreted. This tracking is routinely ignored in quantum information as it is assumed that tracking algorithms will eventually be developed. In this work we help fill this gap and present an algorithm for tracking byproduct operators through a quantum computation.

A new approach to detecting and diagnosing faults in quantum circuits is introduced. In order to account for the probabilistic nature of quantum circuits, collections of test experiments, called binary tomographic tests (BTTs), are generated. A BTT can identify a fault with respect to some user-defined confidence threshold τ. We present an algorithm to generate BTTs that either detect, or ensure the absence of, all modeled faults in a given circuit. We also present an adaptive diagnostic method to locate quantum faults. While classical circuits, even probabilistic ones, only handle ordinary probabilities, quantum circuits deal with quantum states, which have phase as an extra probabilistic parameter. The tomographic testing methods introduced previously for probabilistic circuits are unable to detect differences in phase, and therefore leave many quantum faults undetected. In contrast, we develop a design-for-test method which is specifically intended to detect faults that only affect the phase of a quantum state. We give experimental results for benchmark and random circuits which show high coverage of quantum faults by BTTs, and good resolution in the case of the adaptive diagnosis method.

Some emerging technologies for building computers depend on components and signals whose behavior, under normal or fault conditions, is probabilistic. Examples include stochastic and quantum computing circuits, and conventional nano electronic circuits subject to design, manufacturing or environmental errors. Problems common to these technologies are testing and validation, which require determining whether observed non-deterministic behavior is within acceptable limits. Traditional solution methods rely on the determinism of operations performed by the circuit under test, and are not applicable to probabilistic circuits, where signals are often described by probability distributions. We introduce a generic methodology for testing probabilistic circuits by approximating signal probability distributions using tomograms, which aggregate the outcomes of multiple, repeated test measurements. While the name comes from quantum computation, tomography is applicable to both quantum and non-quantum probabilistic circuits, as we demonstrate. Our methodology makes use of fault or error models that allow handling of large and complex circuits. We report the first experimental results on the tomographic testing of quantum and stochastic circuits.

The current Internet does not enable easy introduction and deployment of new network technologies and services. This paper aims to progress the Future Internet (FI) by introduction of a service composition and execution environment that re-use existing components of access and core networks. This paper presents essential service-centric platforms and software systems that have been developed with the aim to create a flexible environment for an Autonomic Internet.