Bioimpedance spectroscopy allows determining the characteristics of a medium through its electrical response. In dynamic events, the approach based on sequential bioimpedance analyses at different frequencies is not appropriate due to its duration. Simultaneous multi-sine spectroscopy is a suitable alternative to obtain the bioimpedance spectrum in a fast way. The practical implementation of this technique requires the design of programmable filters, which include tunable transconductors, for the separation of the different frequency components of the response signal. Two circuit techniques to design a transconductor with tunable transconductance ( G m ), are proposed. The originality of the solution relies on the subtraction of the G m of two voltage-to-current sections, thus leading not only to a wide tuning range of the effective G m but also to a low value of this circuit parameter. The transconductors were designed and fabricated in 180 nm CMOS technology to operate with 1.8 V. Measurements on 9 samples of the silicon prototypes show that mismatch prevents achieving the very low G m obtained in simulations, even though the deviations are within the variation ranges determined by a Montecarlo analysis. The SF and DP solutions display mean values for the maximum/minimum G m of 10.29 μ A/V/149.5 nA/V and 10.1 μ A/V/302.8 nA/V, respectively, which represent transconductance tuning ratios of 68.8 × and 33.4 × , also respectively. Other remarkable feature of this proposal is that the second-order transconductor-capacitor ( G m - C ) bandpass filters (BPFs), designed for signals separation, incorporate multiple-output versions of the proposed transconductors, thus leading to a reduction of area occupation and power consumption. The BPFs were designed to have nominal values of the gain at the centre frequency and of the quality factor of 0 dB and 2.83, respectively, whereas the centre frequency can be programmed over approximately one decade.

Power Management Units (PMU) are present in most electronic devices today. However, for power and area constrained applications, their design becomes a real challenge, especially when cell-sized autonomous microsystems are targeted. This paper presents an LDO regulator and a voltage reference, which are usually a must in any PMU, for autonomous microsystems fabricated in 65 nm CMOS technology. This PMU has been designed to minimize quiescent power and area, consuming a minimum power of 15.6 nW and occupying only$391~\mu m^{2}$, while being able to deliver up to$40~\mu A$to the load. No significant degradation was observed, as the measured line regulation is 0.173%/V, the temperature coefficient is 128.4 ppm/°C over a very wide temperature range going from 0 °C up to 120 °C, and the PSR at low frequencies is −67.1 dB.

A bandpass filter (BPF), with high quality factor (${Q}$) and wide tuning range of the centre frequency ($f_{0}$), for signal separation in simultaneous multi-sine bioimpedance analysis, is presented. The cell follows the$G_{m}-{C}$approach, where a multiple-output transconductor has been incorporated, for the sake of compactness, and a fully-differential structure has been selected, to enhance the general performance of the solution. The linearized transconductors ($G_{m}$) are based on a double asymmetric differential pair and the integrated capacitors (${C}$) are implemented in such a way that the required transfer function for the differential-mode signal is achieved and the stability of the common-mode component is granted. The BPF has been designed and fabricated in 180 nm CMOS technology to operate with a 1.8-V supply and feature a nominal gain at$f_{0}$of 0 dB and a${Q}$equal to 20, whereas$f_{0}$is programmed by modifying the biasing current of the transconductors. Experimental results, measured on 8 samples of the silicon prototype, show that the BPF centre frequency can be continuously swept from 102 Hz to 2.06 MHz with a supply current ranging between 981 nA and$686~\mu \text{A}$. Besides, the maximum output voltage range of the filter, determined according to the–40 dB THD criterion, varies between around 31.5 mV and 64 mV within the frequency range indicated, thus leading to a dynamic range between 42.3 dB and 48.6 dB, which illustrates its suitability for the target application.

This paper explores the feasibility of a capacitor-less (CL) low-dropout (LDO) regulator to operate efficiently in a low-voltage environment. The CL-LDO scheme selected is based on a unity-gain feedback configuration around the error amplifier (EA), so that the inclusion of high-value on-chip resistors is avoided and different key parameters, such as the power supply rejection or the noise, are optimized. A comparative analysis has been carried out over the same LDO structure including a bulk-driven and a gate-driven EA, respectively. The pass branch of the voltage regulator is provided with pseudo-class-AB operation, in order to lead to a very small quiescent current in the standby operation mode, whereas a very large current can be delivered to the load when required. Both regulators were designed and fabricated in 180 nm CMOS technology to operate with a maximum supply voltage of 1.8 V. The extensive experimental characterization showed that the bulk-driven LDO can achieve a significantly lower minimum supply voltage, i.e., 0.6 V, as compared to the gate-driven counterpart, 1 V, under the same reference voltage and load current conditions.

A subthreshold input voltage charge pump based on the well-known cross-coupled voltage doubler and using boosted gate voltages for the transfer switches is presented. A level shifter and some inverters, including a novel inverter architecture proposed in this work and referred to as negative low-state voltage inverter, are used to generate the clock signals for the switching transistors with the purpose of significantly improving their drive capability. A complete analysis of the proposed charge pump is provided to highlight the advantages of the implemented structure, revealing the power efficiency improvement when the input voltage is below the threshold voltage of the transistors. An extensive experimental characterization of silicon prototypes in 180 nm CMOS technology was carried out, showing that the proposed scheme is able to pump charge from an input voltage as low as 110 mV. The experimental peak efficiency remains above 70% for input voltages between 180 mV and 400 mV and input power levels from 45 nW to 25$\mu \text{W}$, which are appropriate for different miniaturized transducers implementable on chip.

A capacitor-less (CL) low-dropout (LDO) regulator suitable to be incorporated in an on-chip system with low-voltage micro-energy-harvested supply, is proposed in this contribution. The differential input stage of the error amplifier includes bulk-driven MOS transistors, thus providing the LDO with an output voltage range that extends from the negative rail up to a level very close to the input voltage without the need of using a resistive feedback network. The circuit parameters relying on the feedback factor,$\beta $, are maximized thanks to the use of a unitary value for this parameter. The CL-LDO has been designed and fabricated in standard 180-nm CMOS technology and optimized to operate with an input voltage equal to 0.6 V and a reference level of 0.5 V. The experimental characterization of the fabricated prototypes shows that, under these operating conditions, the LDO is able to deliver a load current above 0.75 mA with a total quiescent current of only 7.0 nA. Furthermore, the proposed voltage regulator is able to operate from input voltages as low as 0.4 V, delivering in this case a maximum load current of 30$\mu \text{A}$.

An ultra-low power LDO regulator with an adaptive biasing error amplifier is presented in this paper. An absolute difference voltage meter circuit section based on super source followers is used to achieve the adaptive biasing scheme. The experimental total quiescent current consumption is as low as 1.88 nA with a measured line sensitivity of 0.13 mV/V in a circuit occupying 1473 μm2of silicon area.

A bulk-driven transconductor including a continuous tuning scheme and operated from a 1-V supply is presented in this paper. The voltage-to-current conversion is carried out by means of the source degeneration of a bulk-driven differential pair, while transconductance tuning is obtained by modifying the gain of a current mirror. The proposed circuit has been included in a continuous-time transconductance-C (Gm-C) biquadratic cell designed for the audio bandwidth, which features a programmability range of more than one decade and a dynamic range of 63.7 dB while consuming less than 45 muW.