Clock-gating has been introduced as the primary means of dynamic power management in recent high-end commercial microprocessors. The temperature drop resulting from active power reduction can result in additional leakage power savings in future processors. In this paper we first examine the realistic benefits and limits of clock-gating in current generation high-performance processors (e.g. of the POWER4/spl trade/ or POWER5/spl trade/ class). We then look beyond classical clock-gating: we examine additional opportunities to avoid unnecessary clocking in real workload executions. In particular, we examine the power reduction benefits of a couple of newly invented schemes called transparent pipeline clock-gating and elastic pipeline clock-gating. Based on our experiences with current designs, we try to bound the practical limits of clock gating efficiency in future microprocessors.

article Free Access Share on A stiffly stable integration process using cyclic composite methods Authors: Joel M. Tendler IBM Corporation, Department CO1, Building 702, P.O. Box 390, Poughkeepsie, NY IBM Corporation, Department CO1, Building 702, P.O. Box 390, Poughkeepsie, NYView Profile , Theodore A. Bickart Electrical and Computer Engineering Department, Link Hall, Syracuse University, Syracuse, NY Electrical and Computer Engineering Department, Link Hall, Syracuse University, Syracuse, NYView Profile , Zdenek Picel IBM France Scientific Center, 36 Av R Poincaré, 75016 Paris, France IBM France Scientific Center, 36 Av R Poincaré, 75016 Paris, FranceView Profile Authors Info & Claims ACM Transactions on Mathematical SoftwareVolume 4Issue 4December 1978 pp 339–368https://doi.org/10.1145/356502.356495Published:01 December 1978Publication History 23citation344DownloadsMetricsTotal Citations23Total Downloads344Last 12 Months23Last 6 weeks6 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my Alerts New Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF

multistep formulas, numerical integration program, Fortran code STINT CR Categories-5.16, 5 17 Language' Fortran DESCRIPTIONT h e a l g o r i t h m given here is a c o m p l e m e n t to [1] where the t h e o r e t i c a l developm e n t a n d test results are described.