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John Yeager

dblp:67/2366 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1987
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
logic synthesis		 0.011987
A Computer Algorithm for Minimizing Reed-Muller Canonical Forms · IEEE Trans. Computers 1987
Electronic design automation › logic synthesis › logic minimization
multiple output minimization		 0.011987
A Computer Algorithm for Minimizing Reed-Muller Canonical Forms · IEEE Trans. Computers 1987

Methods — techniques the papers use, named apart from their topics

geometrical operations · 0.0
YearPublicationVenuePosition
1987 A Computer Algorithm for Minimizing Reed-Muller Canonical Forms
abstract
A computer algorithm is presented that uses geometrical operations to minimize multioutput Reed-Muller expansions of up to ten variables.
Harold Fleisher, Morton Tavel, John Yeager
 IEEE Trans. Computers3