A system concept based on a multipath self-routing switching principle and on an internal transfer mode using multislot cells is introduced. With the utilization of a shared buffer memory structure, this concept allows for a single-chip realization of the switching elements and fulfils important system requirements like fault tolerance, independence of the switch core from external data formats and traffic characteristics, and modular extendibility from small to very large systems. An example implementation of the concept with the resulting functional partitioning in boards and chips is given. Performance study results, as a basis for dimensioning, are also presented. The most important design aspects and a possible tool chain exploiting a hardware description language, logic simulator, and logic compiler are highlighted.>