In this study, we investigate the fairness of predictive models in online courses. Our focus is on STEM courses and the prediction of underperforming students. The analysis of the model's fairness is dedicated to students' protected information: gender and age. The Open University Learning Analytics Dataset is selected for this study and two moments of prediction were created for the predictive models: before the midterm and two weeks before the final. The fairness of prediction models is assessed under three conditions: 1) models incorporating students' demographics and interactions with the virtual learning environment, 2) models relying solely on students' interactions with the online learning environment, and 3) models with imposed constraints on age and gender. The results show that hiding students' protected information lowers the fairness of the models. Contrary to that, using these protected attributes to enforce constraints improved fairness while still having good overall accuracy.

The non-linear performance of analogue electronic circuits is crucial during the design phase, while circuit simulators only give measures about the distortion generated by the total circuit, leaving designers clueless about the source of the problem. Distortion Contribution Analysis (DCA) is a simulation-based analysis technique that determines the distortion generated in the sub-circuits and shows their contribution to the total distortion of the circuit. DCA can be used to efficiently decrease the distortion generated by a circuit, because it points the designer to the origin of the problem. Recently, a DCA based on the Best Linear Approximation (BLA) has been introduced as alternative to the Volterra-based techniques. However, a major drawback of the current implementation of the BLA-based DCA is its limitation to single-input single-output frequency response functions to model the behaviour of the sub-circuits. This approach ignores the input and output impedance of the stages, and hence introduces errors. In this paper, an extension of the BLA-based DCA is proposed which uses a MIMO port representation of the sub-circuits. Combining the port representation with a multi-port noise analysis allows the analysis of non-linear circuits without adapting the modelling of the sub-circuits.

A wide tuning range LO generation architecture for software defined radio is presented. A dual VCO approach followed by a programmable divider chain based on high-speed dynamic CMOS latches provides full rail-to-rail operation with low power consumption. The 1.2V 90nm CMOS implementation achieves a VCO tuning range between 6 to 13.6GHz for a power consumption between 3.5 to 13.4mW and phase noise figure of merit of 182dBc/Hz measured at 3MHz offset from a 12GHz carrier. The VCO-multiplexer and divider chain consumes between 5.9 to 8.1mW for this frequency range.

Substrate noise problems in a system-on-a-chip hamper the smooth cohabitation between analog and digital circuitries on the same die. Solving those problems will shorten the time to market. This paper presents a methodology that gives designers the necessary insight to solve this substrate noise problem. The methodology combines the strengths of the electromagnetic simulator, the parasitic extractor, and the circuit simulator. Its main assets are the ease of use, an acceptable simulation time, and a good accuracy. Moreover, this methodology does not need doping profiles that are hard to get hold off. The proposed methodology is demonstrated on two challenging examples: a 48-53-GHz LC voltage-controlled oscillator and a dc-to-5-GHz wideband receiver designed, respectively, in a 0.13-mum and a 90-nm CMOS technology. The substrate noise coupling mechanisms are revealed for both examples in a simulation time of less than 2 hours. The methodology is successfully validated by measurements performed on real-life prototypes of those examples with an accuracy of 1-2 dB.

Nonlinear distortions in submicron analog circuits are gaining importance, especially when power constraints are imposed and when operating in moderate inversion. This paper proposes a method to optimize the design of analog filters for minimum noise and nonlinear distortions. For this purpose a technique is presented for quantifying these nonlinearities, such that their influence can be compared with that of the system noise. Having quantified the non-idealities, an optimization can be carried out which involves the tuning of design parameters

Orthogonal Frequency Division Multiplexing (OFDM) is the modulation of choice for broadband wireless communications. Unfortunately, it comes at the cost of a very low energy efficiency of the analog transmitter. Numerous circuit-level and signal processing techniques have been proposed to improve that energy efficiency. However more disruptive improvement can be achieved at system-level, capitalizing on energy-scalable design and circuit reconfiguration to match the user requirements and operation environment. We describe the design of such an energy-scalable reconfigurable transmitter as well as its control strategy. Based on measurement carried out on the physical realization of this transmitter, the benefit of system-level energy management is shown. Energy-efficiency scalability ranges over 30%, which translates in an average system-level energy improvement of up to 40% compared to a non-scalable system.

The design of complex analog front-ends demands the exploration of a huge design space at different levels of abstraction and using a multitude of simulators. One of the main issues is to guarantee the consistency of the models and the model parameters between the different abstraction levels.A methodology and a tool, called NETLISP, has been developed for the purpose of guaranteeing the consistency between different levels of abstraction. The tool was successfully applied to the design of a multi-mode multi-band analog front-end, showing its applicability on real large-scale designs.

Analyzing the stability of an analog circuit is an important part of the circuit design. Several commercial simulators are equipped with special stability analysis techniques. Problems arise when your design kit does not support such simulator. Another issue is when the designer wants to get insight into the sources of the instability to propose a stabilization. This can be done through analyzing the open-loop or the closed-loop transfer function of the circuit. The aim of this paper is to propose an automated analysis method which identifies the nodes to be considered for stabilization. The method does not need to break feedback loops or to manipulate netlists. It only uses AC simulations and does not require the full modified nodal equations. The method is illustrated on 3 design examples: a voltage controlled oscillator (VCO), a reference bias circuit and the common-mode feedback network in a gm-C filter

Design of electrical systems demands simulations using models evaluated in different design parameter choices. To enable the simulation of linear systems, one often requires their modeling as ordinary differential equations given tabular data obtained from device simulations or measurements. Existing techniques need to do this for every choice of design parameters since the model representations do not scale smoothly with the external parameter. The paper describes a frequency-domain identification algorithm to extract the poles and zeros of linear MIMO systems. Furthermore, it expresses the poles and zeros as trajectories that are functions of the design parameter(s). The paper describes the used framework, solves the starting-value problem, presents a solution for high-order systems and provides a model-order selection strategy. The properties of the algorithm are illustrated on microwave measurements of inductors, a variable gain amplifier and a high-order SAW-filter. As shown by these examples, the proposed identification algorithm is very well suited to derive scalable, physically relevant models out of tabular frequency response data.

Substrate noise is a major obstacle for mixed-signal integration. In this paper we propose a fast and accurate high-level methodology to simulate substrate noise generated by large digital circuits. The methodology can handle any substrate type, e.g. bulk-type or EPI-type, and takes into account the effects of interconnect and supply. For each standard cell a substrate macromodel is used in order to efficiently simulate the total system, which consists of a network of such macromodels. For a 40K gates telecom circuit fabricated in a 0.18 mm CMOS process, measurements indicate that substrate noise is simulated by using our methodology within 20% error but several orders of magnitude faster in CPU time than a full SPICE simulation..

The modeling of linear transfer functions is often required prior to the simulation of electronic systems. An example is the modeling of on-chip inductors starting from 2-port measurements. The modeling is often done using state-space models that can only represent proper systems. This leads to modeling problems in the case of improper systems such as in the case of 2-port modeling of the admittance matrix of an on-chip inductor. This paper first describes an extended state-space model to represent improper systems. Afterwards, the paper introduces an extension to classical frequency-domain subspace identification methods. The usefulness of both the extended state-space model and the extended subspace modeling technique are illustrated by comparing them with commercially available solutions. This includes a comparison on measurements of an on-chip inductor and on simulations of a coplanar waveguide.

The design of analog front-ends of digital telecommunication transceivers requires mixed-signal simulations at the architectural level. The nonlinear nature of the analog front-end blocks is a complication for their modeling at the architectural level, especially when the nonlinear behavior is frequency dependent. This paper describes an analysis and modeling method based on Volterra theory. The method derives bottom-up models of nonlinear analog continuous-time circuits. These behavioral models predict the dominant nonlinear effects using a composition of linear transfer functions and multiplications. This makes it possible to accurately model frequency dependencies and to gain insight into the dominant nonlinear sources of the circuit. The basic models are afterwards described using its multicarrier complex low-pass representation to enable their efficient cosimulation with the digital circuits in a dataflow simulation environment. The multicarrier representation is a direct extension of the classically used complex low-pass equivalent models, which considers the modulation of a single carrier only. The accuracy of the multicarrier representation is higher than classical complex low-pass equivalent models since out-of-band nonlinear distortion is taken into account. The main advantage of the proposed technique is that it yields both insight in the nonlinear behavior at the circuit level and that it provides an important gain in simulation efficiency of RF integrated circuits at the system level. Both aspects are demonstrated on a 5-GHz WLAN design.

RF front-end architectures of today's wireless applications need to meet tough requirements on nonlinear distortion to minimize unwanted effects such as crosstalk. An analysis of the nonlinear behavior of analog communication circuits or architectures is not straightforward. This paper presents a modified Volterra series approach to the simulation of nonlinear systems described at the architectural level. The total computed response is decomposed in its nonlinear contributions and the main nonlinearities can be identified. This yields a better insight into the system's nonlinear behavior and allows simplifications. The simplified system can then be simulated more efficiently. The implementation is only based on vector calculation to minimize the computation time, and has, been applied to a complete 5 GHz WLAN receiver front-end.

Designing complex analog systems needs different abstraction levels to reduce the overall complexity. The required level of abstraction depends on the accuracy and the purpose of the model. High-frequency amplifier mode-Is can vary from simple transfer functions for efficient bit-error-rate analysis up to detailed transistor level descriptions for accurate load-pull prediction. This paper introduces a nonlinear black-box model for high-frequency amplifiers. It extends the linear S-parameter representation to enable both efficient system-level simulations and load-pull prediction. Both are demonstrated on the measurements of a high-frequency amplifier excited using a WLAN-OFDM modulation.

Multicarrier modulation schemes are widely used in several digital telecommunication systems, such as Asymmetric Digital Subscriber Lines (ADSL) and Wireless Local Area Network (WLAN) based on Orthogonal Frequency Domain Multiplexing (OFDM). An estimate of the Bit-Error-Rate (BER) degradation due to non-idealities in the transceiver (e.g. nonlinear distortions in the analog front-ends, digital clipping,...) is much more complicated in a multicarrier system than in a single-carrier system due to the large number of carriers and the huge number of possible transmitted symbols. This paper proposes a method for estimating the BER of such OFDM modulation schemes in a CPU time that is two orders of magnitude smaller than a Monte-Carlo method, as confirmed by simulations on a 5 GHz IEEE 802.11 WLAN receiver front-end.

Wireless transceivers for digital telecommunications are heterogeneous systems that combine digital hardware, software and analog circuitry. The pressure to miniaturization and lower power consumption for these transceivers imposes tight specifications on their analog RF parts. Many aspects of RF circuits cannot be simulated accurately and efficiently with a classical circuit-level SPICE approach. In this paper three important simulation problems for RF circuits are addressed: 1. High-level simulation of analog and RF blocks for the determination of the specifications of the circuits. 2. Accurate circuit-level simulation of nonlinear circuits with time constants that differ largely. 3. Efficient and accurate computation of phase noise in RF oscillators. For each of these problems, solutions are proposed. These solutions illustrate that accurate and efficient simulations of RF communication circuits need a heterogeneous variety of advanced algorithms.

The explosion of the telecommunications market requires miniaturization and cost-effective realization of the front-ends of transceivers for digital telecommunications. New architectures must therefore be simulated at high level. Current methodologies and corresponding tools suffer from common drawbacks, such as lower accuracy, slow simulation speed, etc. A new methodology has been developped for the efficient simulation, at the architectural level, of mixed-signal front-ends of digital telecom transceivers. The efficient execution is obtained using a multi-rate, multi-carrier signal representation together with a dataflow simulation scheme which switches dynamically towards the most efficient signal processing technique available. An implementation of this methodology shows both excellent runtimes and a high accuracy.