Demo Data from EDBT 2026 / reviewers in the wild / expert
Philip S. Liu
dblp:67/6575
· DBLP profile ↗
7ranked-venue papers
4as first author
0since 2021 · last 1983
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 first-authorSoftware engineering, systems software and programming languages · 3 · 2 first-authorArtificial intelligence and machine learning · 1Theory of computation · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
4 papers |
Processor architecture and microarchitecture · 47% Integrated circuit design · 23% Hardware accelerators and domain-specific architectures · 18% | |
| Databases, data mining, and information retrieval
1 paper |
Data mining · 100% | |
| Theoretical computer science
2 papers |
Information theory · 100% | |
| Software engineering, system software, and programming languages
2 papers |
Compilers and program optimization · 100% |
Topics — the 11 heaviest of 15, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › special-purpose processor
matrix multiplication array |
0.0 | 1 | 1983 | VLSI Array Design Under Constraint of Limited I/O Bandwidth · IEEE Trans. Computers 1983 |
Hardware accelerators and domain-specific architectures
systolic array |
0.0 | 1 | 1983 | VLSI Array Design Under Constraint of Limited I/O Bandwidth · IEEE Trans. Computers 1983 |
Integrated circuit design › VLSI design
VLSI array |
0.0 | 1 | 1983 | VLSI Array Design Under Constraint of Limited I/O Bandwidth · IEEE Trans. Computers 1983 |
Processor architecture and microarchitecture
microprogramming |
0.0 | 2 | 1978 | Techniques of Program Execution with a Writable Control Memory · IEEE Trans. Computers 1978 Selection Schemes for Dynamically Microcoding Fortran Programs · ISCA 1976 |
Data mining › predictive modeling
classification |
0.0 | 1 | 1981 | Statistical Pattern Classification with Binary Variables · IEEE Trans. Pattern Anal. Mach. Intell. 1981 |
Storage systems
data compression |
0.0 | 1 | 1980 | Overhead Storage Considerations and a Multilinear Method for Data File Compression · IEEE Trans. Software Eng. 1980 |
Processor architecture and microarchitecture › microprogramming
control store |
0.0 | 2 | 1978 | Techniques of Program Execution with a Writable Control Memory · IEEE Trans. Computers 1978 Selection Schemes for Dynamically Microcoding Fortran Programs · ISCA 1976 |
Information theory › probability theory
probability distribution approximation |
0.0 | 1 | 1978 | Linear transformation of binary random vectors and its application to approximating probability distributions · IEEE Trans. Inf. Theory 1978 |
Compilers and program optimization › dynamic optimization
profile-guided optimization |
0.0 | 1 | 1976 | Selection Schemes for Dynamically Microcoding Fortran Programs · ISCA 1976 |
Machine learning › Representation and self-supervised learning › representation learning
dimensionality reduction |
0.0 | 1 | 1978 | Linear transformation of binary random vectors and its application to approximating probability distributions · IEEE Trans. Inf. Theory 1978 |
Processor architecture and microarchitecture
instruction set architecture |
0.0 | 1 | 1978 | Techniques of Program Execution with a Writable Control Memory · IEEE Trans. Computers 1978 |
Methods — techniques the papers use, named apart from their topics
hamming distance · 0.0characteristic function · 0.0bilinear discriminant function · 0.0processor row loading · 0.0processor column group loading · 0.0multiplexing loading · 0.0two-stage compression table · 0.0simulation · 0.0mutual information minimization · 0.0multilinear method · 0.0linear transformation · 0.0inner loop detection · 0.0automatic microcode conversion · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1983 | VLSI Array Design Under Constraint of Limited I/O BandwidthabstractVLSI computing arrays for matrix multiplication and covariance matrix inversion have applications in many fields. Under the constraint of limited I/O bandwidth of the host system or the computing array, three configurations for the interfacing and controlling of a multiplication array to achieve optimal performance under different adverse situations are examined. The three configurations are multiplexing loading, processor row loading, and processor column group loading. A properly chosen configuration can significantly reduce the computing time of the multiplication array. Philip S. Liu, Tzay Y. Young |
IEEE Trans. Computers | 1 |
| 1981 | Statistical Pattern Classification with Binary VariablesabstractBinary random variables are regarded as random vectors in a binary-field (modulo-2) linear vector space. A characteristic function is defined and related results derived using this formulation. Minimax estimation of probability distributions using an entropy criterion is investigated, which leads to an A-distribution and bilinear discriminant functions. Nonparametric classification approaches using Hamming distances and their asymptotic properties are discussed. Experimental results are presented. Tzay Y. Young, Philip S. Liu, Romulo J. Rondon |
IEEE Trans. Pattern Anal. Mach. Intell. | 2 |
| 1980 | Overhead Storage Considerations and a Multilinear Method for Data File CompressionabstractThe paper is concerned with the reduction of overhead storage, i.e., the stored compression/decompression (C/D) table, in field-level data file compression. A large C/D table can occupy a lage fraction of maim memory space during compression and decompression, and may cause excessve page swapping in virtual memory systems. A two-stage approach is studied, including the reuired additional C/D table decompression time. It appears that the approach has limitations and is not completely satisfactory. Tzay Y. Young, Philip S. Liu |
IEEE Trans. Software Eng. | 2 |
| 1979 | Two-stage data file compressionabstractFor the compression of data fields in the records of a data file, the fixed-length minimum bit (FLMB) method is commonly used. The scheme re quires a compression/decompression (C/D) table which could be very large in size. A large C/D table can occupy a large fraction of the main memory space, and it may cause excessive page swaping in virtual memory systems. To reduce the C/D table overhead storage, a two-stage data compression approach is studied in which several methods are used to further compress the C/D table itself. The resulting C/D table decompression time during the regular data decompression process is also examined. Philip S. Liu, Tzay Y. Young |
COMPSAC | 1 |
| 1978 | Techniques of Program Execution with a Writable Control MemoryabstractThe objective of the present paper is to investigate possible methods to reduce a program's execution time by detecting and converting automatically the more frequently executed program parts, mostly inner loops, into microcode. Philip S. Liu, Frederic J. Mowle |
IEEE Trans. Computers | 1 |
| 1978 | Linear transformation of binary random vectors and its application to approximating probability distributionsabstractA nonsingular linear transformation of binary-valued random vectorsy = xAwhich minimizes a mutual information criterion I(y) is considered. It is shown that a nonsingular A exists such thatI(y) = 0if and only ifxhas a generalized binomial distribution. Computational algorithms for seeking an optimalAare developed, and dimensionality reduction is discussed briefly. This linear transformation is useful in improving the approximation of probability distributions. Numerical examples are presented. Tzay Y. Young, Philip S. Liu |
IEEE Trans. Inf. Theory | 2 |
| 1976 | Selection Schemes for Dynamically Microcoding Fortran ProgramsabstractThe objective of the present study has been to investigate possible methods to reduce a program's execution time by detecting and converting automatically the more frequently executed program parts, mostly inner loops, into microcode. The methods proposed were static loading of inner loops, selective loading of inner loops, over-lay of inner loops, and user-aided scheme. Using Fortran programs as the test programs, a simulation program was written to measure the gain achieved by each method. A final gain between 1.587 and 4.76 was achieved by the proposed methods for memory speed ratios between 3 and 8. It was found that 90% of the final gain of the test programs could be obtained with writable control memory requirements that were less than 40% of the final requirement. Philip S. Liu, Frederic J. Mowle |
ISCA | 1 |