The paper discusses some results of application of a stochastic realization algorithm for developing an ARMA type predictor for a class of speech signals. It is shown that a minimal order adaptive predictor can be obtained for the given speech data using a finite window version of the realization algorithm. The utility of the predictor is first established by processing synthetic signals generated by an ARMA

In a memory system with skewing reconfiguration, a virtual memory address is encoded by an address encoder to avoid using a faulty memory area. This correspondence shows one method to improve the reliability of the address encoder by encoding a virtual memory address together with data to an error correcting code. Only a few additional gates are required for the implementation if the memory system has already employed an error correcting code.

It is shown that the (21,11,6) binary linear code obtained from BCH codes and a single parity check code by constructionXis equivalent to a difference-set cyclic code.