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Santiago Sánchez-Solano

dblp:68/2542 · DBLP profile ↗
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27ranked-venue papers
2as first author
2since 2021 · last 2026
0000-0002-0700-0447ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 19 · 1 first-authorSystems, architecture and hardware · 5 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 3 · 1 first-authorSecurity and privacy · 1 · 1 since 2021Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
1 paper
Hardware security and side channels · 100%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Reconfigurable computing and FPGAs · 94% Integrated circuit design · 6%

Topics — the 7 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware security and side channels › side-channel attack
electromagnetic side channel
1.012026
Analysis of EM Side-Channel Leakage on an RO-PUF and Proposed Countermeasures · IEEE Trans. Dependable Secur. Comput. 2026
Hardware security and side channels › hardware security primitives
physical unclonable function
1.012026
Analysis of EM Side-Channel Leakage on an RO-PUF and Proposed Countermeasures · IEEE Trans. Dependable Secur. Comput. 2026
Hardware security and side channels › hardware security primitives › physical unclonable function
ring oscillator PUF
1.012026
Analysis of EM Side-Channel Leakage on an RO-PUF and Proposed Countermeasures · IEEE Trans. Dependable Secur. Comput. 2026
Hardware security and side channels
side-channel attack
1.012026
Analysis of EM Side-Channel Leakage on an RO-PUF and Proposed Countermeasures · IEEE Trans. Dependable Secur. Comput. 2026
Reconfigurable computing and FPGAs
FPGA implementation
0.312026
Analysis of EM Side-Channel Leakage on an RO-PUF and Proposed Countermeasures · IEEE Trans. Dependable Secur. Comput. 2026
Integrated circuit design
asynchronous circuit design
0.011995
Modular Asynchronous Arbiter Insensitive to Metastability · IEEE Trans. Computers 1995
Integrated circuit design
metastability
0.011995
Modular Asynchronous Arbiter Insensitive to Metastability · IEEE Trans. Computers 1995

Methods — techniques the papers use, named apart from their topics

electromagnetic leakage analysis · 2.0countermeasure design · 2.0
YearPublicationVenuePosition
2026 Analysis of EM Side-Channel Leakage on an RO-PUF and Proposed Countermeasures
abstract
Physical Unclonable Functions (PUFs) are a very useful resource in cryptography with many applications ranging from system authentication to secret key generation. Side-channel attacks (SCAs) are a major concern in any physical implementation of a cryptographic module, and PUFs are no exception. Electromagnetic (EM) leakage from the implementation of a ring-oscillator-based PUF (RO-PUF) can be exploited to retrieve sensitive information that compromises the security of the cryptographic scheme incorporating the PUF. In this paper, we analyse the EM leakage of an RO-PUF implemented on FPGA, highlight its main vulnerabilities, and propose alternative countermeasures and architectures to mitigate the threat of this type of attack. Furthermore, we evaluate the cost in terms of area overhead of the proposed implementations compared to the original design.
Alejandro Casado-Galán, Santiago Sánchez-Solano, Erica Tena, Luis F. Rojas-Muñoz, Francisco Eugenio Potestad-Ordóñez, Macarena C. Martínez-Rodríguez, Antonio J. Acosta 0001
IEEE Trans. Dependable Secur. Comput.2
2021 Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm
abstract
Post-quantum cryptographic algorithms have emerged to secure communication channels between electronic devices faced with the advent of quantum computers. The performance of post-quantum cryptographic algorithms on embedded systems has to be evaluated to achieve a good trade-off between required resources (area) and timing. This work presents two optimized implementations to speed up the NTRUEncrypt algorithm on a system-on-chip. The strategy is based on accelerating the most time-consuming operation that is the truncated polynomial multiplication. Hardware dedicated modules for multiplication are designed by exploiting the presence of consecutive zeros in the coefficients of the blinding polynomial. The results are validated on a PYNQ-Z2 platform that includes a Zynq-7000 SoC from Xilinx and supports a Python-based programming environment. The optimized version that exploits the presence of double, triple, and quadruple consecutive zeros offers the best performance in timing, in addition to considerably reducing the possibility of an information leakage against an eventual attack on the device, making it practically negligible.
Eros Camacho-Ruiz, Santiago Sánchez-Solano, Piedad Brox Jiménez, Macarena C. Martínez-Rodríguez
ACM J. Emerg. Technol. Comput. Syst.2
2013 CAD Tools for Hardware Implementation of Embedded Fuzzy Systems on FPGAs
abstract
This paper describes two computer-aided design (CAD) tools for automatic synthesis of fuzzy logic-based inference systems. The tools share a common architecture for efficient hardware implementation of fuzzy modules, but are based on two different design strategies. One of them is focused on the generation of standard VHDL code, which can be later implemented on a reconfigurable device [field-programmable gate array (FPGA)] or as an application-specific integrated circuit (ASIC). The other one uses the Matlab/Simulink environment and tools for development of digital signal processing (DSP) systems on Xilinx's FPGAs. Both tools are included in the last version of Xfuzzy, which is a specific environment for designing complex fuzzy systems, and they provide interfaces to commercial VHDL synthesis and verification tools, as well as to conventional FPGA development environments. As demonstrated by the included design example, the proposed development strategies speed up the stages of description, synthesis, and functional verification of embedded fuzzy inference systems.
María Brox, Santiago Sánchez-Solano, Ernesto del Toro, Piedad Brox Jiménez, Francisco Jose Moreno-Velo
IEEE Trans. Ind. Informatics2
2013 Model-Based Design Methodology for Rapid Development of Fuzzy Controllers on FPGAs
abstract
The complexity reached by current applications of industrial control systems has motivated the development of new computational paradigms, as well as the employment of hybrid implementation techniques that combine hardware and software components to fulfill system requirements. On the other hand, continuous improvements in field-programmable devices today make possible the implementation of complex control systems on reconfigurable hardware, although they are limited by the lack of specific design tools and methodologies to facilitate the development of new products. This paper describes a model-based design approach for the synthesis of embedded fuzzy controllers on field-programmable gate arrays (FPGAs). Its main contributions are the proposal of a novel implementation technique, which allows accelerating the exploration of the design space of fuzzy inference modules, and the use of a design flow that eases their integration into complex control systems and the joint development of hardware and software components. This design flow is supported by specific tools for fuzzy systems development and standard FPGA synthesis and implementation tools, which use the modeling and simulation facilities provided by the Matlab environment. The development of a complex control system for parking an autonomous vehicle demonstrates the capabilities of the proposed procedure to dramatically speed up the stages of description, synthesis, and functional verification of embedded fuzzy controllers for industrial applications.
Santiago Sánchez-Solano, María Brox, Ernesto del Toro, Piedad Brox Jiménez, Iluminada Baturone
IEEE Trans. Ind. Informatics1
2012 XFSML: An XML-based modeling language for fuzzy systems
abstract
This paper presents a new modeling language for fuzzy systems called XFSML. It is an XML-based language and it is proposed as a starting point for the definition of a standard modeling language in the fuzzy community. The main features of the language are its high expressiveness and its independence from specific platforms, tools or programming languages.
Francisco Jose Moreno-Velo, Angel Barriga, Santiago Sánchez-Solano, Iluminada Baturone
FUZZ-IEEE3
2011 XFVHDL4: A hardware synthesis tool for fuzzy systems
abstract
This paper presents a design technique that allows the automatic synthesis of fuzzy inference systems and accelerates the exploration of the design space of these systems. It is based on generic VHDL code generation which can be implemented on a programmable device (FPGA) or an application specific integrated circuit (ASIC). The set of CAD tools supporting this technique includes a specific environment for designing fuzzy systems, in combination with commercial VHDL simulation and synthesis tools. As demonstrated by the analyzed design examples, the described development strategy speeds up the stages of description, synthesis, and functional verification of fuzzy inference systems.
María Brox, Santiago Sánchez-Solano, L. Delgado
ISDA2
2010 Tuning of a hierarchical fuzzy system for video de-interlacing
abstract
The tuning of hierarchical fuzzy systems are not supported by the majority of CAD tools available at the market currently. The xfsl tool integrated into Xfuzzy 3 allows the tuning of complex fuzzy systems, for instance, hierarchical systems with modules in cascade. The authors propose the use of this tool for tuning a complex fuzzy system for video de-interlacing in this paper. The parameters obtained after tuning are proven by de-interlacing a wide battery of sequences. The use of tuning techniques improves the quality of de-interlacing and provides an algorithm simplification that facilitates its hardware implementation.
Piedad Brox Jiménez, Iluminada Baturone, Santiago Sánchez-Solano
FUZZ-IEEE3
2010 A design environment for synthesis of embedded fuzzy controllers on FPGAs
abstract
This paper presents a design environment for the synthesis of embedded fuzzy controllers on FPGAs. It provides a novel implementation technique that allows accelerating the exploration of the design space of fuzzy control modules, as well as a codesign flow that eases their integration into complex control systems and the joint development of hardware and software components. The set of CAD tools supporting this environment includes specific fuzzy logic design tools provided by Xfuzzy, FPGA synthesis and implementation tools from Xilinx, and modeling and simulation facilities from Matlab. As demonstrated by the analyzed design examples, the described development strategy takes advantage of flexibility and ease of configuration offered by the different tools to dramatically speed up the stages of description, synthesis, and functional verification of embedded fuzzy control systems.
Santiago Sánchez-Solano, Ernesto del Toro, María Brox, Iluminada Baturone, Angel Barriga
FUZZ-IEEE1
2010 Hardware-software Codesign of Fuzzy Control Systems using FPGAs
Ernesto del Toro, Santiago Sánchez-Solano, María Brox, Alejandro Cabrera Sarmiento
ICINCO (1)2
2010 An automated design flow from linguistic models to piecewise polynomial digital circuits
abstract
This paper describes how the different CAD tools of the environment Xfuzzy 3, developed in Microelectronics Institute of Seville and University of Seville, allow to translate expressive linguistic models into mathematical ones, in particular, into a combination of piecewise polynomial systems that can be implemented efficiently in hardware. The new synthesis tool of Xfuzzy 3 automates communication with Xilinx System Generator in Matlab, thus facilitating implementation of the linguistic model into an FPGA from Xilinx. This is illustrated with the design of a navigation controller for an autonomous robot.
Iluminada Baturone, Santiago Sánchez-Solano, Andrés Gersnoviez, María Brox
ISCAS2
2008 Linguistic summarization of network traffic flows
abstract
We address, by means of fuzzy linguistic summaries, two related problems: summarizing network flow statistics and making these statistics human-readable. Two complementary summarization methods are developed. First, a fixed set of protoforms of interest is defined, and the ones with a higher truth value are shown to the user as simple on-line summaries. This first method is suitable for real-time monitoring. Then, an association rules mining process is carried out in order to find hidden relations in flow records. Both approaches are implemented in a tool capable of real-time and off-line processing of network flow records. Experimental results for a number of heterogeneous NetFlow records show the usefulness of linguistic summaries to both network practitioners and users.
Federico Montesino-Pouzols, Angel Barriga, Diego R. López, Santiago Sánchez-Solano
FUZZ-IEEE4
2007 Using Xfuzzy Environment for the Whole Design of Fuzzy Systems
abstract
Since 1992, Xfuzzy environment has been improving to ease the design of fuzzy systems. The current version, Xfuzzy 3, which is entirely programmed in Java, includes a wide set of new featured tools that allow automating the whole design process of a fuzzy logic based system: from its description (in the XFL3 language) to its synthesis in C, C++ or Java (to be included in software projects) or in VHDL (for hardware projects). The new features of the current version have been exploited in different application areas such as autonomous robot navigation and image processing.
Iluminada Baturone, Francisco Jose Moreno-Velo, Santiago Sánchez-Solano, Angel Barriga, Piedad Brox Jiménez, Andrés Gersnoviez, María Brox
FUZZ-IEEE3
2007 A fuzzy edge-dependent motion adaptive algorithm for de-interlacing
Piedad Brox Jiménez, Iluminada Baturone, Santiago Sánchez-Solano, Julio Gutiérrez-Ríos, Felipe Fernández-Hernández
Fuzzy Sets Syst.3
2007 Automatic tuning of complex fuzzy systems with Xfuzzy
Francisco Jose Moreno-Velo, Iluminada Baturone, Angel Barriga, Santiago Sánchez-Solano
Fuzzy Sets Syst.4
2007 Erratum to "Automatic tuning of complex fuzzy systems with Xfuzzy": [Fuzzy Sets and System 158 (2007) 2026-2038]
Francisco Jose Moreno-Velo, Iluminada Baturone, Angel Barriga, Santiago Sánchez-Solano
Fuzzy Sets Syst.4
2006 Development of IP Modules of Fuzzy Controllers for the Design of Embedded Systems on FPGAs
abstract
This paper describes the design of fuzzy logic-based controllers as IP modules compatible with the processing systems available in the current families from Xilinx. These modules can be used as standard peripherals connectable to the OPB bus for the processors available in FPGAs, such as MicroBlaze or Power PC. The use of inference techniques based on fuzzy logic allows the development of complex control systems from the linguistic description of the knowledge of an expert operator, without any need to employ mathematical models, and provides good robustness in the face of changing operational conditions
María Brox, Santiago Sánchez-Solano
FPL2
2006 Fuzzy End-to-End Rate Control for Internet Transport Protocols
abstract
End-to-end Internet packet dynamics is a complex problem for which models available to date are at best incomplete. A major research problem in Internet transport layer protocols is the development of rate control mechanisms that can cope with the requirements of a growing diversity of technologies, applications and services. This paper describes novel mechanisms for intelligent end-to-end traffic rate control in Internet by means of fuzzy systems. We first outline a fuzzy logic based generalization of TCP (Transport Control Protocol) rate control principles. The design of a fuzzy TCP-like window-based rate controller is then described. A systematic fuzzy systems design methodology is used in order to simulate and implement the system as an experimental tool. A comparative evaluation of simulation and implementation results from the fuzzy rate controller as compared to that of traditional controllers is outlined. Besides being a useful modelling approach, the fuzzy rule based rate controller is shown to outperform other approaches with regards to a number of criteria.
Federico Montesino-Pouzols, Diego R. López, Angel Barriga, Santiago Sánchez-Solano
FUZZ-IEEE4
2006 Fuzzy Motion Adaptive Algorithm for Video De-interlacing
Piedad Brox Jiménez, Iluminada Baturone, Santiago Sánchez-Solano, Julio Gutiérrez-Ríos, Felipe Fernández-Hernández
KES (2)3
2006 Modelling and implementation of fuzzy systems based on VHDL
Angel Barriga, Santiago Sánchez-Solano, Piedad Brox Jiménez, Alejandro Cabrera Sarmiento, Iluminada Baturone
Int. J. Approx. Reason.2
2004 The parametric definition of membership functions in XFL3
abstract
This paper presents a study of the different kinds of membership function (MF) definitions, regarding free MFs and families of MFs, and describes the capabilities of XFL3 (the formal specification language defined by Xfuzzy 3) to manage them. This includes not only the possibility of using them in a system design, but also the capability for extending the available functions with new user-defined membership functions and families. An application example has been included in order to discuss on the suitable parametric definition of the functions.
Francisco Jose Moreno-Velo, Iluminada Baturone, Santiago Sánchez-Solano, Angel Barriga
FUZZ-IEEE3
2004 Automatic design of fuzzy controllers for car-like autonomous robots
abstract
This paper describes the design and implementation of a fuzzy control system for a car-like autonomous vehicle. The problem addressed is the diagonal parking in a constrained space, a typical problem in motion control of nonholonomic robots. The architecture proposed for the fuzzy controller is a hierarchical scheme which combines seven modules working in series and in parallel. The rules of each module employ the adequate fuzzy operators for its task (making a decision or generating a smoothly varying control output), and they have been obtained from heuristic knowledge and numerical data (with geometric information) depending on the module requirements (some of them are constrained to provide paths of near-minimal lengths). The computer-aided design tools of the environment Xfuzzy 3.0 (developed by some of the authors) have been employed to automate the different design stages: 1) translation of heuristic knowledge into fuzzy rules; 2) extraction of fuzzy rules from numerical data and their tuning to give paths of near-minimal lengths; 3) offline verification of the control system behavior; and 4) its synthesis to be implemented in a true robot and be verified on line. Real experiments with the autonomous vehicle ROMEO 4R (designed and built at the Escuela Superior de Ingenieros, University of Seville, Seville, Spain) demonstrate the efficiency of the described controller and of the methodology followed in its design.
Iluminada Baturone, Francisco Jose Moreno-Velo, Santiago Sánchez-Solano, Aníbal Ollero
IEEE Trans. Fuzzy Syst.3
2003 Tuning complex fuzzy systems by supervised learning algorithms
abstract
Tuning a fuzzy system to meet a given set of input/output patterns is usually a difficult task that involves many parameters. This paper presents an study of different approaches that can be applied to perform this tuning process automatically, and describes a CAD tool, named xfsl, which allows applying a wide set of these approaches: (a) a large number of supervised learning algorithms; (b) different processes to simplify the learned system; (c) tuning only specific parameters of the system; (d) the ability to tune hierarchical fuzzy systems, systems with continuous output (like fuzzy controller) as well as with categorical output (like fuzzy classifiers), and even systems that employ user-defined fuzzy functions; and, finally, (e) the ability to employ this tuning within the design flow of a fuzzy system, because xfsl is integrated into the fuzzy system development environment Xfuzzy 3.0.
Francisco Jose Moreno-Velo, Iluminada Baturone, Raouf Senhadji-Navarro, Santiago Sánchez-Solano
FUZZ-IEEE4
2003 Rapid design of fuzzy systems with Xfuzzy
abstract
The crecient use of fuzzy systems in complex applications has motivated us to develop a new version of Xfuzzy, the design environment for fuzzy system created at the IMSE (Instituto de Microelectronica de Sevilla). This new version, Xfuzzy 3.0, offers the advantages of being enterely programmed in Java, and allows designing hierarchical rule bases that can interchange fuzzy or non fuzzy values as well as employ user-defined fuzzy connectives, linguistic hedges, membership functions, and defuzzification methods. Xfuzzy 3.0 integrates tools that facilitate the description, tuning, verification, and synthesis of complex fuzzy systems. This is illustrated in this paper with the design of a fuzzy controller to solve a parking problem.
Francisco Jose Moreno-Velo, Iluminada Baturone, Santiago Sánchez-Solano, Angel Barriga
FUZZ-IEEE3
2002 Hardware/software codesign methodology for fuzzy controller implementation
abstract
Describes a HW/SW codesign methodology for the implementation of fuzzy controllers on a platform composed of a general-purpose microcontroller and specific processing elements implemented on FPGAs or ASICs. The different phases of the methodology, as well as the CAD tools used in each design stage, are presented, with emphasis on the fuzzy system development environment Xfuzzy. Also included is a practical application of the described methodology for the development of a fuzzy controller for a dosage system.
Alejandro Cabrera Sarmiento, Santiago Sánchez-Solano, Raouf Senhadji-Navarro, Angel Barriga, Carlos Jesús Jiménez-Fernández
FUZZ-IEEE2
1998 XFVHDL: A Tool for the Synthesis of Fuzzy Logic Controllers
abstract
A tool for the synthesis of fuzzy controllers is presented in this paper. This tool takes as input the behavioral specification of a controller and generates its VHDL description according to a target architecture. The VHDL code can be synthesized by means of two implementation methodologies, ASIC and FPGA. The main advantages of using this approach are rapid prototyping, and the use of well-known commercial design environments like Synopsys, Mentor Graphics, or Cadence.
E. Lago, Carlos Jesús Jiménez-Fernández, Diego R. López, Santiago Sánchez-Solano, Angel Barriga
DATE4
1997 Implementation of CMOS fuzzy controllers as mixed-signal integrated circuits
abstract
This paper discusses architectural and circuit-level aspects related to hardware realizations of fuzzy controllers. A brief overview on fuzzy inference methods is given focusing on chip implementation. The singleton or zero-order Sugeno's method is chosen since it offers a good tradeoff between hardware simplicity and control efficiency. The CMOS microcontroller described herein processes information in the current-domain, but input-output signals are represented as voltage to ease communications with conventional control circuitry. Programming functionalities are added by combining analog and digital techniques, giving rise to a versatile microcontroller, capable of solving different control problems. After identifying the basic component blocks, the circuits used for their implementation are discussed and compared with other alternatives. This study is illustrated with the experimental results of prototypes integrated in different CMOS technologies.
Iluminada Baturone, Santiago Sánchez-Solano, Angel Barriga, José Luis Huertas
IEEE Trans. Fuzzy Syst.2
1995 Modular Asynchronous Arbiter Insensitive to Metastability
abstract
The purpose of this paper is to present a novel modular N-user asynchronous arbiter circuit which is insensitive to metastable operation (i.e., the new arbiter cannot fail because of metastability), operating asynchronously and incorporating a modular architecture. A 1.5 /spl mu/m CMOS prototype arbiter has been designed and tested. Laboratory tests demonstrate the arbiter operates correctly.
Manuel Valencia-Barrero, Manuel Jesús Bellido Díaz, José Luis Huertas, Antonio J. Acosta 0001, Santiago Sánchez-Solano
IEEE Trans. Computers5