Modern nanopore sequencers generate raw signal data at high speed, demanding low-latency and energy-efficient basecalling pipelines to enable fully portable genomic analysis. In this work, we present a hardware accelerator for the Viterbi-based connectionist temporal classification (CTC) decoding stage of basecalling—a key bottleneck in translating neural network outputs into deoxyribonucleic acid (DNA) sequences. Our design is the first pipelined CTC Viterbi decoder architecture tailored for nanopore sequencing and is implemented on a Xilinx Virtex-7 (VC707) FPGA within a Linux-capable reduced instruction set computer-fifth generation (RISC-V) system-on-chip (SoC). The accelerator processes over 23 000 DNA bases per second at 100 MHz with about$4.3~\boldsymbol {\mu }$s per-sample latency and only 0.43-W overhead power. This corresponds to$\textbf {5.3}\times \mathbf {10^{4}}$bases/J ($19~\boldsymbol {\mu }$J/base) and yields approximately 7x end-to-end speedup over a CPU baseline, while reserving the baseline read-identity accuracy. For the same CTC task, the accelerator delivers 29x higher throughput than a recent FPGA beam-search decoder. These results demonstrate the viability of dedicated decoding accelerators for real time, on-device genomic processing in power-constrained environments.

The development of small DNA sequencers offers a transformative opportunity for portable genomics. However, current systems lack integrated bioinformatics computing and instead rely on bulky external systems. To address this limitation, we propose an embedded System-on-Chip (SoC) architecture aimed at mobile DNA sequencing applications, representing an initial step towards a fully integrated bioinformatics solution. The proposed heterogeneous SoC leverages the open-source RISC-V architecture and incorporates two specialized bioinformatics accelerators: one for deep learning-based basecalling and the other for sequence alignment. An FPGA-realized basecalling accelerator achieves a nearly 2000× speedup over a standalone RISC-V core and demonstrates 11.5× and 1.2× higher energy efficiency than x86 CPUs and high-end GPUs, respectively, while maintaining an accuracy rate of 83.7%. A separate accelerator optimized for sequence comparison, offers 538× and 357× performance-per-joule boost relative to x86 CPUs and an existing state-of-the-art accelerator, respectively, while far exceeding other platforms. A preliminary ASIC prototype operates at 250 MHz with a power consumption of 34 mW, demonstrating significant potential for the proposed approach. Overall, the proposed SoC architecture presents a compelling first step towards embedded bioinformatics hardware for mobile DNA sequencing.

DNA sequencers are being miniaturized and increasingly targeted toward mobile applications. However, the intense bioinformatic computing needs of sequencers present a challenge for remote use with limited energy supply. This article presents a step toward realizing a low-power and high-speed bioinformatic engine, a hardware-accelerated basecaller, for mobile sequencing applications. The design is targeted for nanopore-based sequencers and is architected to easily scale to the complexity of this sensor. In addition to accelerating the CPU in real time with a custom field-programmable gate array (FPGA) through a high-speed serial link, the proposed framework envisages the challenging memory requirement of high-order nanopore sensors. The framework proposes a memory management scheme, which provisions the memory requirement problem in three dimensions: the basecalling speed, the circuit's area, and power consumption. The implementation results demonstrate a $142\times $ basecalling speed improvement over a 12-core CPU-only reference, as well as significant speedup compared with other existing solutions. Also, an energy efficiency improvement of three orders of magnitude is measured.

This paper presents a detailed study for indoor wireless environments, where transmit power, rate and target bit error rate (BER) are varied to increase spectral efficiency. The study is conducted for the recently proposed joint fading and two-path shadowing (JFTS) channel model, which is shown to be accurate for modeling non-Gaussian indoor WLAN environments. Analysis is done for both average and instantaneous BER constraints without channel coding, where only a discrete finite set of constellations is available. Numerical results show that, for a JFTS channel i) varying only the transmission rate (modulation constellation size) achieves more improvement in spectral efficiency compared to varying transmit power only, and ii) varying rate and/or power subject to instantaneous BER (I-BER) constraint offers better performance than when subject to average BER (A-BER) constraint.

Performance of common digital modulation techniques is analyzed over indoor wireless environments modeled through the recently proposed joint fading and two-path shadowing (JFTS) channel model. Mathematically tractable expressions for the instantaneous signal-to-noise ratio statistics, average bit error rates, and achievable channel cutoff rates are derived. Analytical results are used to: 1) investigate the impact of different JFTS model parameters and different modulation techniques on bit error rates and cutoff rates and 2) demonstrate how the JFTS channel model affects system performance in comparison with conventional empirical channel models. Finally simulation results are used to corroborate this analysis and evaluate the usefulness of such an analysis.

Unmanned aerial vehicles, or drones, have the potential to significantly reduce the cost and time of making last-mile deliveries and responding to emergencies. Despite this potential, little work has gone into developing vehicle routing problems (VRPs) specifically for drone delivery scenarios. Existing VRPs are insufficient for planning drone deliveries: either multiple trips to the depot are not permitted, leading to solutions with excess drones, or the effect of battery and payload weight on energy consumption is not considered, leading to costly or infeasible routes. We propose two multitrip VRPs for drone delivery that address both issues. One minimizes costs subject to a delivery time limit, while the other minimizes the overall delivery time subject to a budget constraint. We mathematically derive and experimentally validate an energy consumption model for multirotor drones, demonstrating that energy consumption varies approximately linearly with payload and battery weight. We use this approximation to derive mixed integer linear programs for our VRPs. We propose a cost function that considers our energy consumption model and drone reuse, and apply it in a simulated annealing (SA) heuristic for finding suboptimal solutions to practical scenarios. To assist drone delivery practitioners with balancing cost and delivery time, the SA heuristic is used to show that the minimum cost has an inverse exponential relationship with the delivery time limit, and the minimum overall delivery time has an inverse exponential relationship with the budget. Numerical results confirm the importance of reusing drones and optimizing battery size in drone delivery VRPs.

This paper presents a new approach towards the development of a free-breathing micro-spirometer system on a single chip for point-of-care (POC) diagnosis of lung diseases. In this paper, we take the first step by designing and implementing a cantilever array chip using a standard micro-electromechanical system (MEMS) process. Each cantilever beam is incorporated with capacitive electrodes for sensing the cantilever deflection. Herein we also put forward a custom-made readout interface circuit for the measurement of minute capacitive changes and for data acquisition purposes. Furthermore, we demonstrate and discuss the fabrication and characterization and spirometry results. Based on these results, the device is used for measuring the breathing airflow with a resolution better than 12 bits. These preliminary results reveal the functionality and applicability of the propose d system for POC diagnostics applications related to lung disease.

This paper presents a dual path Nuclear Magnetic Resonance (NMR) receiver dedicated to low cost NMR bio-molecular spectroscopy. Herein we present the design and implementation of CMOS based NMR receiver consisting of an integrated circuit (IC) incorporated with four mini-Coils for NMR exciting and recording purposes. The proposed 21 MHz CMOS receiver consists of differential low-noise amplifiers (LNAs), voltage buffers, phase shifters and variable gain amplifiers (VGA) integrated in single chip using 0.13 CMOS process. In this paper, we put forward the design and implementation of RF integrated circuit. We also demonstrate and discuss the simulation and experimental results. These results prove the functionality of the proposed fully differential front-end receiver occupying 1 mm2silicon area.

Nanopore-based molecular sensing affords a close coupling between DNA sequencing and semiconductor signal processing. This link, in turn, promises to greatly expand genomics applications to health-care and environmental stewardship. As discussed in this paper CMOS technology possesses the ability to process nanopore signals for the purpose of initial data estimation (basecalling) faster by three-decades than the industrial state-of-the-art and the key analog front-end and digital back-end component s of such an ASIC are described herein. In particular, the design of a 3-MHz 130-nm CMOS front-end with reduced area, 2× reduction in power, and 25% noise improvement is discussed along with a back-end capable of achieving at least a 3× improvement in signal detection accuracy.

The performance of rate adaptive M-ary quadra- ture amplitude modulation (M-QAM) and adaptive trellis-coded M-QAM in large open office indoor wireless environments is studied in this paper. An appropriate composite fading/shadowing channel model termed the Joint Fading and Two-path Shadowing (JFTS) model is adopted for the indoor wireless environment. Mathematically tractable expressions for the spectral efficiency and average bit error rate (ABER) of adaptive coded and uncoded M-QAM over the JFTS channel are derived. Analytical results demonstrate the performance of adaptive M-QAM over different JFTS channel configurations, and simulation results corroborate the derived analytical ABER expressions.

An improved-accuracy algorithm for real-time nanopore-based signal detection (e.g. base calling) is introduced. The approach is based on the cumulative sum technique but employs a decision-directed policy coupled with a post-decision correction mechanism. These additions allow the improved detector to achieve at least a 10× accuracy improvement over a previously reported method while tolerating much greater decision threshold variation. As a result the new technique can better accommodate high-speed embedded nanopore measurement applications such as DNA sequencing where high-frequency noise and coarse data conversion otherwise profoundly degrade detection accuracy.

In molecular communication information is conveyed through chemical signals. In this work, we have considered a novel communication scheme where information is encoded in chemical barcodes, through use of persistent chemical tags. We have assumed that this information is already encoded in the environment, and we have devised a robotic platform for reading the chemical tag. We have performed many experiments to find the optimal encoding scheme and an algorithm for reading and decoding the chemically tagged information. We have demonstrated that chemical tags can be decoded using simple algorithms and inexpensive, off-the-shelf sensors. Finally, we have evaluated and presented the bit error rate performance of our devised algorithm.

We present a fully integrated CMOS stacked detection inductor and front-end receiver for NMR applications. Instead of a planar CMOS NMR detection coil, we propose a multi-turn differential stacked inductor with hollowed core. Such a structure makes available the possibility of introducing minute analyte samples directly within the sensing coil with ensuing boost in NMR measurement sensitivity. Physical simulations of the hollowed inductor stack are used to verify the superiority of a differential coil topology. The front-end receiver contains LC pre-amplification, low-noise amplifier (LNA) and voltage buffer. Both the differential stacked detection inductor and front-end receiver are designed for 300 MHz NMR settings. The front-end receiver achieves an input referred noise of 780 pV/√Hz and voltage gain of 43 dB. The core of the LNA draws a DC current of 3.4-mA from a 1.6 V supply voltage. The chip is designed in a 0.13-μm CMOS technology and occupies an area of 1 mm × 2 mm.

Minimizing the cost of deploying and operating a wireless sensor network (WSN) involves deciding how to partition a budget between competing expenses such as node hardware, energy, and labor. Most commercial network operators account for interest rates in their budgeting exercises, providing a financial incentive to defer some costs until a later time. In this paper, we propose a net present cost (NPC) model for WSN capital and operating expenses that accounts for interest rates. Our model optimizes the number, size, and spacing between expenditures in order to minimize the NPC required for the network to achieve a desired operational lifetime. In general, this optimization problem is non-convex, but if the spacing between expenditures is linearly proportional to the size of the expenditures, and the number of maintenance cycles is known in advance, the problem becomes convex and can be solved to global optimality. If non-deferrable recurring costs are low, then evenly spacing the expenditures can provide near-optimal results. With the provided models and methods, network operators can now derive a payment schedule to minimize NPC while accounting for various operational parameters. The numerical examples show substantial cost benefits under practical assumptions.

The performance of Turbo coded Binary Phase Shift Keying (BPSK) over the Joint Fading and Two-path Shadowing (JFTS) environment is analyzed. Exact analytical expression for the Pairwise Error Probability (PEP) of Turbo codes over fully interleaved JFTS channels is presented using the probability distribution of the squared independent and identically distributed JFTS random variables. Finally the Turbo coded Average Bit Error Rate (ABER) of a wireless communication system is simulated over JFTS fading / shadowing channels and compared with the derived analytical result.

A new expression for the Cumulative Distribution Function (CDF) of the Joint Fading and Two-path Shadowing (JFTS) distribution is derived in this paper. The derived theoretical CDF expression is shown to agree with the experimental results. The CDF expression is used to derive an outage expression for non-diversity transmission which is then used to illustrate the performance of adaptive transmission over the JFTS link.

The performance of Binary Phase Shift Keying (BPSK) in a Joint fading and Two-path Shadowing (JFTS)environment is analyzed. Closed form expression for the exact Average Bit Error Rate (ABER) of coherent BPSK scheme is presented using the Moment Generating Function (MGF) of the JFTS distribution. Finally the coherent BPSK ABER of a wireless communication system is simulated over JFTS fading / shadowing channels with and without non- iterative Forward Error Correction (FEC) coding and compared with the analytical ABER expression.

This paper presents a 12.5-Gb/s on-chip oscilloscope (OCO) circuit to measure eye diagrams and jitter histograms of high-speed digital signals. The proposed circuit adopts a novel architecture to capture both single-ended and differential signals. In addition, it is capable of measuring the eye openings and jitter of the input signals without the need to construct the whole eye diagram which makes it a suitable candidate for eye-opening monitor circuits. An asynchronous sampling technique and an efficient algorithm are employed in this research to decrease the area of the OCO as well as its processing time. The proposed circuit is fabricated in a 65-nm CMOS technology and the measurement results show sub-picosecond resolution when the input signals consist of a 10-GHz clock signal and a 12.5-Gb/s pseudorandom binary sequence. The OCO circuit has a power consumption of 1.9 mW, and its core area is 40 × 60 μm.

Over its lifetime, a Wireless Sensor Network (WSN) loses connectivity as more and more of its battery-powered nodes fail. In this paper, we study how to repair such a network by the gradual deployment of new sensor nodes. We provide algorithms that not only economically adjust the number of replaced nodes but also improve the network by placing the new nodes in better locations. This new approach substantially increases the lifetime of the repaired WSN compared to replacing all nodes at their old positions.

Deploying wireless sensor networks (WSNs) from unmanned aerial vehicles (UAVs) can reduce the cost of large rollouts and make it safer to deploy sensors in disaster areas. However, aerial deployment can lead to nodes with arbitrary orientations and, thus, to misaligned antennas. While this problem was observed during experiments, it has not been systematically studied so far. This paper considers an aerially deployed network that utilizes routing designed to minimize latency and improve reliability. A new antenna model is used to demonstrate the performance degradation caused by aerial deployment. By mitigating a large share of this degradation, cooperative relaying substantially reduces the energy consumption of the network.

This work investigates how wireless network performance affects a rescue robot that is running a simultaneous localization and mapping (SLAM) algorithm. The SLAM algorithm is used to generate a map of an unknown disaster site. Odometry and laser range data collected by the robot is transferred via an ad-hoc wireless network to a central access point (AP) that is running the SLAM algorithm. Simulation is used to determine how losses, latency and the use of relays in the network affect the quality and completeness of the SLAM maps. This is illustrated using new metrics for SLAM map quality and completeness that are based on Hausdorff distance.

We present an approach for the development of lightweight analog cognition for autonomous navigation in unknown environments. We consider a hypothetical differential drive robot, equipped with a limited sensor suite that includes one front and one rear monocular obstacle sensor and a target (bearing and distance) sensor. A robotic motion control scheme is developed for obstacle avoidance and target-seeking using an innovative dynamical systems architecture incorporating a nonlinear controller derived using Lyapunov techniques. We claim that the avoidance-steering behavioral property of the agent is a weakly emergent characteristic. Simulations are provided and discussed.

This work presents a new amplify-and-forward (AF) cooperative multiple input multiple output (MIMO) transmission scheme based on phase sweep transmit diversity. In a single hop cooperative link, the relay node imposes a phase sweep on the signal it receives from the source node. This phase sweeping causes fast fading when the signals from the source and relay nodes combine at the destination. On low velocity or static links, this fast fading improves channel code performance. The method used to implement the phase sweeping results in a relay node design that is much simpler than other AF schemes while still providing a comparable performance improvement.

This work uses spatial radio channel measurements to evaluate how much IEEE 802.11b wireless local area network (WLAN) capacity could be improved by using spatial division multiple access (SDMA). The radio channel measurements are collected for three different indoor network configurations using a sectorized antenna suitable for use in an actual 802.11b access point. The measurements are then used directly in 802.11b physical layer simulations in order to evaluate SDMA performance.

A study of the effects of front-end impairments on the overall performance of a direct conversion wireless receiver using SDMA is presented. A system-level model, simulated with Verilog-AMS and using Verilog behavioral blocks, is used to evaluate the performance of the receiver under non-ideal RF circuit conditions. Design issues inherent to direct conversion receivers, including IIP2, quadrature mismatches, LO self-mixing and 1/fnoise are included in the RF models. In addition, noise figure, IIP3 and LO phase noise are modeled. Simulation results show that the use of SDMA is able to significantly boost system performance and compensate for much of the RF impairments. For example, it is seen that I/Q amplitude and phase mismatches of 5 dB and 32deg respectively, can be tolerated while still providing acceptable bit error rate.