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Jörg Schmittler

dblp:68/5220 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 2005
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Graphics, computer vision, multimedia, augmented reality and games · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer graphics and multimedia
1 paper
Rendering · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
GPUs and heterogeneous computing · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Rendering
ray tracing
0.112005
RPU: a programmable ray processing unit for realtime ray tracing · ACM Trans. Graph. 2005
Rendering › ray tracing
real-time ray tracing
0.112005
RPU: a programmable ray processing unit for realtime ray tracing · ACM Trans. Graph. 2005
GPUs and heterogeneous computing › graphics accelerator
ray tracing hardware
0.112005
RPU: a programmable ray processing unit for realtime ray tracing · ACM Trans. Graph. 2005

Methods — techniques the papers use, named apart from their topics

FPGA prototype · 0.1
YearPublicationVenuePosition
2005 RPU: a programmable ray processing unit for realtime ray tracing
abstract
Recursive ray tracing is a simple yet powerful and general approach for accurately computing global light transport and rendering high quality images. While recent algorithmic improvements and optimized parallel software implementations have increased ray tracing performance to realtime levels, no compact and programmable hardware solution has been available yet.This paper describes the architecture and a prototype implementation of a single chip, fully programmable Ray Processing Unit (RPU). It combines the flexibility of general purpose CPUs with the efficiency of current GPUs for data parallel computations. This design allows for realtime ray tracing of dynamic scenes with programmable material, geometry, and illumination shaders.Although, running at only 66 MHz the prototype FPGA implementation already renders images at up to 20 frames per second, which in many cases beats the performance of highly optimized software running on multi-GHz desktop CPUs. The performance and efficiency of the proposed architecture is analyzed using a variety of benchmark scenes.
Sven Woop, Jörg Schmittler, Philipp Slusallek
ACM Trans. Graph.2
2003 A virtual memory architecture for real-time ray tracing hardware
Jörg Schmittler, Alexander Leidinger, Philipp Slusallek
Comput. Graph.1