Operating in the near-threshold regime can result in significant energy savings. Unfortunately, the increased timing variation prevents conventional error-detection techniques from properly functioning. This paper introduces two circuit-level timing error detection techniques that aim to increase throughput while operating in the near-threshold voltage regime: current-sensing completion detection and transition-aware completion detection. Each method allows any digital circuit to operate at speeds not limited by the worst-case critical path. Throughput improvements and energy savings are reported for implementations on a 16-bit adder.