Mario Aldea Rivas

dblp:69/2649 · DBLP profile ↗
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10ranked-venue papers
4as first author
5since 2021 · last 2023
0000-0002-0430-5472ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 7 · 2 first-author · 5 since 2021Software engineering, systems software and programming languages · 1
YearPublicationVenuePosition
2023 Response-time analysis of mesh-based many-core systems
abstract
Scheduling models can be used to evaluate whether a particular system is able to meet its timing constrains. In many-core processors, with tens to hundreds of processors in the same chip, the analysis of the timing behavior needs to include the communications network used to exchange messages between the different processors. This paper presents a schedulability model for many-core systems based on a 2D mesh network-on-chip and store-and-forward switching with a limitation on the maximum link utilization rate that makes the analysis tractable. The model has been applied to the Epiphany many-core processor which has 16 cores connected by a 4 × 4 2D mesh. The analysis results have been tested on the real hardware by executing examples with synthetic task workloads. Those tasks are executed in a micro-kernel RTOS that we have developed. We also describe synchronization mechanisms to send messages between the tasks, and we analyze their timing behavior, so that they can be included in the analysis model.
David García Villaescusa, Mario Aldea Rivas, Michael González Harbour
J. Syst. Archit.2
2022 Priority assignment in hierarchically scheduled time-partitioned distributed real-time systems with multipath flows
abstract
The increasing complexity in the design of industrial embedded systems represents a challenge in the development of scheduling algorithms for such systems, which are essential to guarantee that they meet their deadlines even in the worst-case situation. In this work, we propose a new collection of non-iterative priority assignment algorithms for multipath flows within hierarchical schedulers based on state-of-the-art scheduling algorithms, which have been adapted to this complex system model. They are applied to an industrial railway use case that has motivated this work, and then their performance is evaluated in different general synthetic scenarios, with the aim of providing a view on how they behave in a wider range of system configurations.
Andoni Amurrio, J. Javier Gutiérrez, Mario Aldea Rivas, Ekain Azketa
J. Syst. Archit.3
2022 Partition window assignment in hierarchically scheduled time-partitioned distributed real-time systems with multipath flows
abstract
Time and space partitioning techniques are implemented in the development of safety-critical applications to ensure isolation among components. A suitable arrangement of the execution of such partitions is a key challenge so that applications meet the timing requirements imposed to software. In this work, the effect of window sizes and context switch overheads in the partition window configuration is studied, with the aim of analyzing their impact when the response-time analysis and priority assignment techniques are applied. Then, a heuristic algorithm is proposed, in order to obtain a partition window configuration that enables the schedulability of partition-based safety critical systems. This algorithm is evaluated in synthetic test scenarios and it is also applied to a safety-critical use-case in the railway domain.
Andoni Amurrio, J. Javier Gutiérrez, Mario Aldea Rivas, Ekain Azketa
J. Syst. Archit.3
2022 Special issue on Reliable Software Technologies (AEiC2021)
J. Javier Gutiérrez, Mario Aldea Rivas
J. Syst. Archit.2
2021 Special issue on advances in reliable software technologies (AdaEurope20)
Mario Aldea Rivas
J. Syst. Archit.1
2019 Leveraging real-time and multitasking Ada capabilities to small microcontrollers
Mario Aldea Rivas, Héctor Pérez 0001
J. Syst. Archit.1
2017 Multiprocessor platform for partitioned real-time systems
abstract
Two current trends in the real-time and embedded systems are the multiprocessor architectures and the partitioning technology that enables several isolated applications with different criticality levels to share the same computer. This paper presents a real-time platform for multiprocessor and partitioned systems, in which communication requirements are also considered. The paper describes the adaptation of MaRTE OS (a monoprocessor real-time operating system) to the XtratuM hypervisor for the multiprocessor Intel x86 architecture. This adaptation makes two contributions to ease the development process of future mixed-criticality applications: firstly, it integrates the hypervisor technology and the fully partitioned scheduling in a multiprocessor environment, and secondly, it provides the basis to interconnect partitioned and non-partitioned applications via a homogeneous communication subsystem. Copyright © 2016 John Wiley & Sons, Ltd.
Héctor Pérez 0001, Mario Aldea Rivas, Daniel Medina Ortega
Softw. Pract. Exp.2
2015 A Deadline-Floor Inheritance Protocol for EDF Scheduled Embedded Real-Time Systems with Resource Sharing
abstract
Earliest Deadline First (EDF) is the most widely studied optimal dynamic scheduling algorithm for uniprocessor real-time systems. For realistic programs, tasks must be allowed to exchange data and use other forms of resources that must be accessed under mutual exclusion. With EDF scheduled systems, access to such resources is usually controlled by the use of Baker’s Stack Resource Protocol (SRP). In this paper we propose an alternative scheme based on deadline inheritance. Shared resources are assigned a relative deadline equal to the minimum (floor) of the relative deadlines of all tasks that use the resource. On entry to the resource a task’s current absolute deadline is subject to an immediately reduction to reflect the resource’s deadline floor. On exit the original deadline for the task is restored. We show that the worst-case behaviour of the new protocol (termed DFP—Deadline Floor inheritance Protocol) is the same as SRP. Indeed it leads to the same blocking term in the scheduling analysis. We argue that the new scheme is however more intuitive, removes the need to support preemption levels and we demonstrate that it can be implemented more efficiently.
Alan Burns 0001, Marina Gutiérrez, Mario Aldea Rivas, Michael González Harbour
IEEE Trans. Computers3
2003 Evaluation of New POSIX Real-Time Operating Systems Services for Small Embedded Platforms
abstract
The ongoing revision of the POSIX.13 standard - real-time profiles for portable operating system interfaces - proposes adding services to the minimum real-time system profile that are considered useful to the small embedded applications to which this profile is targeted. Concerns have been raised that these services may introduce too much overhead or may be difficult to implement. In this paper, we evaluate the implementation of some of these services in our MaRTE operating system. The implemented services are the monotonic clock, a high resolution sleep operation with specifiable clock, execution-time clock and timers, the sporadic server scheduling policy, and the timed mutex lock operation. We show that the complexity of these implementations is small, and the overheads introduced by the new services are fully acceptable.
Mario Aldea Rivas, Michael González Harbour
ECRTS1
2002 POSIX-Compatible Application-Defined Scheduling in MaRTE OS
abstract
Presents an application program interface (API) that enables applications to use application-defined scheduling algorithms in a way compatible with the scheduling model defined in POSIX. Several application-defined schedulers, implemented as special user threads, can coexist in the system in a predictable way. This API is currently implemented on our operating system MaRTE OS. We plan to propose it for a future revision of the POSIX standard.
Mario Aldea Rivas, Michael González Harbour
ECRTS1