EDBT 2026 Demo / reviewers in the wild / expert
Zia Iqbal
dblp:69/6503
· DBLP profile ↗
2ranked-venue papers
1as first author
0since 2021 · last 1993
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 90% Processor architecture and microarchitecture · 10% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › physical design › timing optimization
critical path reduction |
0.0 | 1 | 1993 | Critical Path Minimization Using Retiming and Algebraic Speed-Up · DAC 1993 |
Electronic design automation
high-level synthesis |
0.0 | 1 | 1993 | Critical Path Minimization Using Retiming and Algebraic Speed-Up · DAC 1993 |
Electronic design automation
logic synthesis |
0.0 | 1 | 1993 | Critical Path Minimization Using Retiming and Algebraic Speed-Up · DAC 1993 |
Processor architecture and microarchitecture › pipelining
pipeline design |
0.0 | 1 | 1993 | Critical Path Minimization Using Retiming and Algebraic Speed-Up · DAC 1993 |
Electronic design automation › logic synthesis › sequential circuit optimization
retiming |
0.0 | 1 | 1993 | Critical Path Minimization Using Retiming and Algebraic Speed-Up · DAC 1993 |
Methods — techniques the papers use, named apart from their topics
retiming · 0.0algebraic speed-up · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1993 | Critical Path Minimization Using Retiming and Algebraic Speed-UpabstractThe power of retiming is often limited by the underlying topology of a computational structure.We combine the power of retiming with a complete set of algebraic transformations in an iterative improvement framework, where retiming and algebraic speed-up algorithms are successively applied, so that the latter enables the former.The key part of the approach is a new algebraic speed-up algorithm being used for the first time in high-level synthesis for transformations of algebraic expressions so that an arbitrary set of input arrival times and output required times are satisfied.Since the new method moves delays forward only and retiming is done locally and very infrequently, it also always calculates the new initial state efficiently.The proposed approach has yielded results better or equal to the best previously published on all benchmark examples and on several novel real-life examples. Zia Iqbal, Miodrag Potkonjak, Sujit Dey, Alice C. Parker |
DAC | 1 |
| 1993 | High Performance Embedded System Optimization Using Algebraic and Generalized Retiming TechniquesabstractRetiming, algebraic and redundancy manipulation transformations are widely used in both the high level synthesis and the compilers fields. We present a new approach on how these powerful transformations can be applied to improve the performance of embedded systems, by optimizing their latency and throughput. A simple modification is sufficient to adapt both the Leiserson-Saxe retiming algorithm and the recently introduced ERB algorithm for the new task. We introduce a new negative retiming technique and the algorithm which coordinates this technique with both algebraic and redundancy manipulation techniques for latency optimization. The effectiveness of all discussed techniques is demonstrated on a set of "real-life" examples. Latency and throughput are improved by factors of 7.06 and 2.83 respectively, often with minimal or no additional hardware overhead.> Miodrag Potkonjak, Sujit Dey, Zia Iqbal, Alice C. Parker |
ICCD | 3 |